mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
Start implementing translation of MachineInstr to MCInst. Next
step is to make tblgen generate something more appropriate for MCInst, and generate calls to operand translation routines where needed. This includes a bunch of #if 0 code which will slowly be refactored into something sensible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73810 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -771,6 +771,29 @@ void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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if (NewAsmPrinter) {
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O << "NEW: ";
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MCInst TmpInst;
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TmpInst.setOpcode(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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MCOperand MCOp;
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if (MO.isReg()) {
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MCOp.MakeReg(MO.getReg());
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} else if (MO.isImm()) {
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MCOp.MakeImm(MO.getImm());
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} else {
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assert(0 && "Unimp");
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}
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TmpInst.addOperand(MCOp);
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}
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if (MI->getOpcode() == X86::LEA64_32r) {
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// Should handle the 'subreg rewriting' for the lea64_32mem operand.
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}
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// FIXME: Convert TmpInst.
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printInstruction(&TmpInst);
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O << "OLD: ";
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@ -28,14 +28,14 @@ void X86ATTAsmPrinter::printSSECC(const MCInst *MI, unsigned Op) {
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unsigned char value = MI->getOperand(Op).getImm();
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assert(value <= 7 && "Invalid ssecc argument!");
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switch (value) {
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case 0: O << "eq"; break;
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case 1: O << "lt"; break;
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case 2: O << "le"; break;
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case 3: O << "unord"; break;
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case 4: O << "neq"; break;
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case 5: O << "nlt"; break;
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case 6: O << "nle"; break;
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case 7: O << "ord"; break;
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case 0: O << "eq"; break;
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case 1: O << "lt"; break;
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case 2: O << "le"; break;
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case 3: O << "unord"; break;
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case 4: O << "neq"; break;
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case 5: O << "nlt"; break;
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case 6: O << "nle"; break;
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case 7: O << "ord"; break;
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}
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}
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@ -48,13 +48,353 @@ void X86ATTAsmPrinter::printPICLabel(const MCInst *MI, unsigned Op) {
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void X86ATTAsmPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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const char *Modifier, bool NotRIPRel) {
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//assert(Modifier == 0 && "Modifiers should not be used");
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isReg()) {
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O << '%';
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unsigned Reg = Op.getReg();
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#if 0
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if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
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MVT VT = (strcmp(Modifier+6,"64") == 0) ?
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MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
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((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
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Reg = getX86SubSuperRegister(Reg, VT);
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}
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#endif
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O << TRI->getAsmName(Reg);
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return;
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} else if (Op.isImm()) {
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//if (!Modifier || (strcmp(Modifier, "debug") && strcmp(Modifier, "mem") &&
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// strcmp(Modifier, "call")))
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O << '$';
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O << Op.getImm();
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return;
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}
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O << "<<UNKNOWN OPERAND KIND>>";
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#if 0
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const MachineOperand &MO = MI->getOperand(OpNo);
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switch (MO.getType()) {
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case MachineOperand::MO_Register: {
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assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Virtual registers should not make it this far!");
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O << '%';
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unsigned Reg = MO.getReg();
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if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
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MVT VT = (strcmp(Modifier+6,"64") == 0) ?
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MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
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((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
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Reg = getX86SubSuperRegister(Reg, VT);
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}
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O << TRI->getAsmName(Reg);
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return;
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}
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case MachineOperand::MO_Immediate:
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if (!Modifier || (strcmp(Modifier, "debug") &&
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strcmp(Modifier, "mem") &&
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strcmp(Modifier, "call")))
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O << '$';
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O << MO.getImm();
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return;
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMBB(), false, false, VerboseAsm);
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return;
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case MachineOperand::MO_JumpTableIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << '$';
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O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_'
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<< MO.getIndex();
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if (TM.getRelocationModel() == Reloc::PIC_) {
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if (Subtarget->isPICStyleStub())
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O << "-\"" << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
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<< "$pb\"";
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else if (Subtarget->isPICStyleGOT())
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O << "@GOTOFF";
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}
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if (isMemOp && Subtarget->isPICStyleRIPRel() && !NotRIPRel)
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O << "(%rip)";
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return;
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}
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case MachineOperand::MO_ConstantPoolIndex: {
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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if (!isMemOp) O << '$';
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O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
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<< MO.getIndex();
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if (TM.getRelocationModel() == Reloc::PIC_) {
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if (Subtarget->isPICStyleStub())
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O << "-\"" << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
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<< "$pb\"";
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else if (Subtarget->isPICStyleGOT())
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O << "@GOTOFF";
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}
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printOffset(MO.getOffset());
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if (isMemOp && Subtarget->isPICStyleRIPRel() && !NotRIPRel)
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O << "(%rip)";
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return;
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}
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case MachineOperand::MO_GlobalAddress: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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bool needCloseParen = false;
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const GlobalValue *GV = MO.getGlobal();
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const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
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if (!GVar) {
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// If GV is an alias then use the aliasee for determining
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// thread-localness.
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if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
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GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
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}
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bool isThreadLocal = GVar && GVar->isThreadLocal();
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std::string Name = Mang->getValueName(GV);
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decorateName(Name, GV);
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if (!isMemOp && !isCallOp)
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O << '$';
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else if (Name[0] == '$') {
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// The name begins with a dollar-sign. In order to avoid having it look
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// like an integer immediate to the assembler, enclose it in parens.
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O << '(';
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needCloseParen = true;
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}
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if (shouldPrintStub(TM, Subtarget)) {
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// Link-once, declaration, or Weakly-linked global variables need
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// non-lazily-resolved stubs
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if (GV->isDeclaration() || GV->isWeakForLinker()) {
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// Dynamically-resolved functions need a stub for the function.
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if (isCallOp && isa<Function>(GV)) {
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// Function stubs are no longer needed for Mac OS X 10.5 and up.
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if (Subtarget->isTargetDarwin() && Subtarget->getDarwinVers() >= 9) {
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O << Name;
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} else {
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FnStubs.insert(Name);
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printSuffixedName(Name, "$stub");
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}
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} else if (GV->hasHiddenVisibility()) {
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if (!GV->isDeclaration() && !GV->hasCommonLinkage())
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// Definition is not definitely in the current translation unit.
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O << Name;
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else {
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HiddenGVStubs.insert(Name);
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printSuffixedName(Name, "$non_lazy_ptr");
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}
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} else {
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GVStubs.insert(Name);
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printSuffixedName(Name, "$non_lazy_ptr");
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}
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} else {
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if (GV->hasDLLImportLinkage())
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O << "__imp_";
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O << Name;
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}
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if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
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O << '-' << getPICLabelString(getFunctionNumber(), TAI, Subtarget);
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} else {
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if (GV->hasDLLImportLinkage()) {
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O << "__imp_";
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}
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O << Name;
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if (isCallOp) {
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if (shouldPrintPLT(TM, Subtarget)) {
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// Assemble call via PLT for externally visible symbols
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if (!GV->hasHiddenVisibility() && !GV->hasProtectedVisibility() &&
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!GV->hasLocalLinkage())
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O << "@PLT";
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}
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if (Subtarget->isTargetCygMing() && GV->isDeclaration())
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// Save function name for later type emission
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FnStubs.insert(Name);
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}
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}
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if (GV->hasExternalWeakLinkage())
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ExtWeakSymbols.insert(GV);
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printOffset(MO.getOffset());
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if (isThreadLocal) {
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TLSModel::Model model = getTLSModel(GVar, TM.getRelocationModel());
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switch (model) {
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case TLSModel::GeneralDynamic:
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O << "@TLSGD";
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break;
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case TLSModel::LocalDynamic:
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// O << "@TLSLD"; // local dynamic not implemented
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O << "@TLSGD";
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break;
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case TLSModel::InitialExec:
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if (Subtarget->is64Bit()) {
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assert (!NotRIPRel);
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O << "@GOTTPOFF(%rip)";
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} else {
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O << "@INDNTPOFF";
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}
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break;
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case TLSModel::LocalExec:
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if (Subtarget->is64Bit())
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O << "@TPOFF";
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else
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O << "@NTPOFF";
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break;
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default:
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assert (0 && "Unknown TLS model");
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}
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} else if (isMemOp) {
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if (shouldPrintGOT(TM, Subtarget)) {
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if (Subtarget->GVRequiresExtraLoad(GV, TM, false))
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O << "@GOT";
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else
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O << "@GOTOFF";
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} else if (Subtarget->isPICStyleRIPRel() && !NotRIPRel) {
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if (TM.getRelocationModel() != Reloc::Static) {
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if (Subtarget->GVRequiresExtraLoad(GV, TM, false))
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O << "@GOTPCREL";
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if (needCloseParen) {
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needCloseParen = false;
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O << ')';
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}
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}
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// Use rip when possible to reduce code size, except when
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// index or base register are also part of the address. e.g.
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// foo(%rip)(%rcx,%rax,4) is not legal
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O << "(%rip)";
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}
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}
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if (needCloseParen)
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O << ')';
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return;
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}
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case MachineOperand::MO_ExternalSymbol: {
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bool isCallOp = Modifier && !strcmp(Modifier, "call");
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bool isMemOp = Modifier && !strcmp(Modifier, "mem");
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bool needCloseParen = false;
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std::string Name(TAI->getGlobalPrefix());
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Name += MO.getSymbolName();
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// Print function stub suffix unless it's Mac OS X 10.5 and up.
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if (isCallOp && shouldPrintStub(TM, Subtarget) &&
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!(Subtarget->isTargetDarwin() && Subtarget->getDarwinVers() >= 9)) {
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FnStubs.insert(Name);
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printSuffixedName(Name, "$stub");
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return;
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}
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if (!isMemOp && !isCallOp)
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O << '$';
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else if (Name[0] == '$') {
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// The name begins with a dollar-sign. In order to avoid having it look
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// like an integer immediate to the assembler, enclose it in parens.
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O << '(';
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needCloseParen = true;
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}
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O << Name;
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if (shouldPrintPLT(TM, Subtarget)) {
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std::string GOTName(TAI->getGlobalPrefix());
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GOTName+="_GLOBAL_OFFSET_TABLE_";
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if (Name == GOTName)
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// HACK! Emit extra offset to PC during printing GOT offset to
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// compensate for the size of popl instruction. The resulting code
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// should look like:
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// call .piclabel
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// piclabel:
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// popl %some_register
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// addl $_GLOBAL_ADDRESS_TABLE_ + [.-piclabel], %some_register
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O << " + [.-"
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<< getPICLabelString(getFunctionNumber(), TAI, Subtarget) << ']';
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if (isCallOp)
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O << "@PLT";
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}
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if (needCloseParen)
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O << ')';
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if (!isCallOp && Subtarget->isPICStyleRIPRel())
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O << "(%rip)";
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return;
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}
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default:
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O << "<unknown operand type>"; return;
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}
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#endif
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}
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void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op,
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const char *Modifier,
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bool NotRIPRel) {
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const MCOperand &BaseReg = MI->getOperand(Op);
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const MCOperand &IndexReg = MI->getOperand(Op+2);
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const MCOperand &DispSpec = MI->getOperand(Op+3);
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NotRIPRel |= IndexReg.getReg() || BaseReg.getReg();
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if (DispSpec.isImm()) {
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int64_t DispVal = DispSpec.getImm();
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if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
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O << DispVal;
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} else {
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abort();
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//assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
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// DispSpec.isJTI() || DispSpec.isSymbol());
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//printOperand(MI, Op+3, "mem", NotRIPRel);
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}
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if (IndexReg.getReg() || BaseReg.getReg()) {
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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unsigned BaseRegOperand = 0, IndexRegOperand = 2;
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// There are cases where we can end up with ESP/RSP in the indexreg slot.
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// If this happens, swap the base/index register to support assemblers that
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// don't work when the index is *SP.
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// FIXME: REMOVE THIS.
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if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) {
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assert(ScaleVal == 1 && "Scale not supported for stack pointer!");
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abort();
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//std::swap(BaseReg, IndexReg);
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//std::swap(BaseRegOperand, IndexRegOperand);
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}
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O << '(';
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if (BaseReg.getReg())
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printOperand(MI, Op+BaseRegOperand, Modifier);
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if (IndexReg.getReg()) {
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O << ',';
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printOperand(MI, Op+IndexRegOperand, Modifier);
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if (ScaleVal != 1)
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O << ',' << ScaleVal;
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}
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O << ')';
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}
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}
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void X86ATTAsmPrinter::printMemReference(const MCInst *MI, unsigned Op,
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const char *Modifier, bool NotRIPRel){
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#if 0
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assert(isMem(MI, Op) && "Invalid memory reference!");
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MachineOperand Segment = MI->getOperand(Op+4);
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if (Segment.getReg()) {
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printOperand(MI, Op+4, Modifier);
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O << ':';
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}
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printLeaMemReference(MI, Op, Modifier, NotRIPRel);
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#endif
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}
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