[PowerPC] Support powerpc64le as a syntax-checking target.

This patch provides basic support for powerpc64le as an LLVM target.
However, use of this target will not actually generate little-endian
code.  Instead, use of the target will cause the correct little-endian
built-in defines to be generated, so that code that tests for
__LITTLE_ENDIAN__, for example, will be correctly parsed for
syntax-only testing.  Code generation will otherwise be the same as
powerpc64 (big-endian), for now.

The patch leaves open the possibility of creating a little-endian
PowerPC64 back end, but there is no immediate intent to create such a
thing.

The LLVM portions of this patch simply add ppc64le coverage everywhere
that ppc64 coverage currently exists.  There is nothing of any import
worth testing until such time as little-endian code generation is
implemented.  In the corresponding Clang patch, there is a new test
case variant to ensure that correct built-in defines for little-endian
code are generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187179 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Schmidt
2013-07-26 01:35:43 +00:00
parent fb5b3eaacb
commit f38cc38fa6
22 changed files with 73 additions and 17 deletions
@@ -396,7 +396,7 @@ uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr) {
StubAddr++;
*StubAddr = NopInstr;
return Addr;
} else if (Arch == Triple::ppc64) {
} else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le) {
// PowerPC64 stub: the address points to a function descriptor
// instead of the function itself. Load the function address
// on r11 and sets it to control register. Also loads the function
@@ -770,7 +770,8 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
(uint32_t)(Value & 0xffffffffL), Type,
(uint32_t)(Addend & 0xffffffffL));
break;
case Triple::ppc64:
case Triple::ppc64: // Fall through.
case Triple::ppc64le:
resolvePPC64Relocation(Section, Offset, Value, Type, Addend);
break;
case Triple::systemz:
@@ -985,7 +986,7 @@ void RuntimeDyldELF::processRelocationRef(unsigned SectionID,
RelType, 0);
Section.StubOffset += getMaxStubSize();
}
} else if (Arch == Triple::ppc64) {
} else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le) {
if (RelType == ELF::R_PPC64_REL24) {
// A PPC branch relocation will need a stub function if the target is
// an external symbol (Symbol::ST_Unknown) or if the target address
@@ -172,7 +172,7 @@ protected:
return 8; // 32-bit instruction and 32-bit address
else if (Arch == Triple::mipsel || Arch == Triple::mips)
return 16;
else if (Arch == Triple::ppc64)
else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le)
return 44;
else if (Arch == Triple::x86_64)
return 8; // GOT