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[PowerPC] Support powerpc64le as a syntax-checking target.
This patch provides basic support for powerpc64le as an LLVM target. However, use of this target will not actually generate little-endian code. Instead, use of the target will cause the correct little-endian built-in defines to be generated, so that code that tests for __LITTLE_ENDIAN__, for example, will be correctly parsed for syntax-only testing. Code generation will otherwise be the same as powerpc64 (big-endian), for now. The patch leaves open the possibility of creating a little-endian PowerPC64 back end, but there is no immediate intent to create such a thing. The LLVM portions of this patch simply add ppc64le coverage everywhere that ppc64 coverage currently exists. There is nothing of any import worth testing until such time as little-endian code generation is implemented. In the corresponding Clang patch, there is a new test case variant to ensure that correct built-in defines for little-endian code are generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187179 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -396,7 +396,7 @@ uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr) {
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StubAddr++;
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*StubAddr = NopInstr;
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return Addr;
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} else if (Arch == Triple::ppc64) {
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} else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le) {
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// PowerPC64 stub: the address points to a function descriptor
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// instead of the function itself. Load the function address
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// on r11 and sets it to control register. Also loads the function
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@@ -770,7 +770,8 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
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(uint32_t)(Value & 0xffffffffL), Type,
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(uint32_t)(Addend & 0xffffffffL));
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break;
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case Triple::ppc64:
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case Triple::ppc64: // Fall through.
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case Triple::ppc64le:
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resolvePPC64Relocation(Section, Offset, Value, Type, Addend);
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break;
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case Triple::systemz:
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@@ -985,7 +986,7 @@ void RuntimeDyldELF::processRelocationRef(unsigned SectionID,
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RelType, 0);
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Section.StubOffset += getMaxStubSize();
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}
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} else if (Arch == Triple::ppc64) {
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} else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le) {
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if (RelType == ELF::R_PPC64_REL24) {
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// A PPC branch relocation will need a stub function if the target is
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// an external symbol (Symbol::ST_Unknown) or if the target address
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@@ -172,7 +172,7 @@ protected:
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return 8; // 32-bit instruction and 32-bit address
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else if (Arch == Triple::mipsel || Arch == Triple::mips)
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return 16;
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else if (Arch == Triple::ppc64)
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else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le)
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return 44;
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else if (Arch == Triple::x86_64)
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return 8; // GOT
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