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Set register class of a register according to value of HasMips64.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-09-26 21:55:17 +00:00
parent 8b4198da9d
commit f40de9d287
1 changed files with 1 additions and 1 deletions
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2
lib/Target/Mips/MipsISelLowering.cpp
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@ -2268,7 +2268,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
else if (RegVT == MVT::f32)
RC = Mips::FGR32RegisterClass;
else if (RegVT == MVT::f64)
RC = Mips::AFGR64RegisterClass;
RC = HasMips64 ? Mips::FGR64RegisterClass : Mips::AFGR64RegisterClass;
else
llvm_unreachable("RegVT not supported by FormalArguments Lowering");