mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
[mips][msa] Use CHECK-LABEL where missing, and remove checks matching the .size directive. NFC.
Summary: Reviewers: vkalintiris Reviewed By: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9339 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236219 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders
parent
d63766eb03
commit
f424f1da46
@ -42,7 +42,6 @@ define void @const_v16i8() nounwind {
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; MIPS32-AE: ld.b [[R1:\$w[0-9]+]], 0([[G_PTR]])
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ret void
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; MIPS32-AE: .size const_v16i8
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}
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define void @const_v8i16() nounwind {
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@ -73,7 +72,6 @@ define void @const_v8i16() nounwind {
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; MIPS32-AE: ld.h [[R1:\$w[0-9]+]], 0([[G_PTR]])
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ret void
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; MIPS32-AE: .size const_v8i16
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}
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define void @const_v4i32() nounwind {
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@ -104,7 +102,6 @@ define void @const_v4i32() nounwind {
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; MIPS32-AE: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
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ret void
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; MIPS32-AE: .size const_v4i32
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}
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define void @const_v2i64() nounwind {
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@ -134,7 +131,6 @@ define void @const_v2i64() nounwind {
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; MIPS32-AE: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
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ret void
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; MIPS32-AE: .size const_v2i64
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}
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define void @nonconst_v16i8(i8 signext %a, i8 signext %b, i8 signext %c, i8 signext %d, i8 signext %e, i8 signext %f, i8 signext %g, i8 signext %h) nounwind {
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@ -180,7 +176,6 @@ define void @nonconst_v16i8(i8 signext %a, i8 signext %b, i8 signext %c, i8 sign
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store volatile <16 x i8> %16, <16 x i8>*@v16i8
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ret void
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; MIPS32-AE: .size nonconst_v16i8
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}
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define void @nonconst_v8i16(i16 signext %a, i16 signext %b, i16 signext %c, i16 signext %d, i16 signext %e, i16 signext %f, i16 signext %g, i16 signext %h) nounwind {
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@ -210,7 +205,6 @@ define void @nonconst_v8i16(i16 signext %a, i16 signext %b, i16 signext %c, i16
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store volatile <8 x i16> %8, <8 x i16>*@v8i16
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ret void
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; MIPS32-AE: .size nonconst_v8i16
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}
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define void @nonconst_v4i32(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d) nounwind {
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@ -228,7 +222,6 @@ define void @nonconst_v4i32(i32 signext %a, i32 signext %b, i32 signext %c, i32
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store volatile <4 x i32> %4, <4 x i32>*@v4i32
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ret void
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; MIPS32-AE: .size nonconst_v4i32
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}
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define void @nonconst_v2i64(i64 signext %a, i64 signext %b) nounwind {
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@ -244,7 +237,6 @@ define void @nonconst_v2i64(i64 signext %a, i64 signext %b) nounwind {
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store volatile <2 x i64> %2, <2 x i64>*@v2i64
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ret void
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; MIPS32-AE: .size nonconst_v2i64
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}
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define i32 @extract_sext_v16i8() nounwind {
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@ -263,7 +255,6 @@ define i32 @extract_sext_v16i8() nounwind {
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; MIPS32-AE-NOT: sra
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ret i32 %4
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; MIPS32-AE: .size extract_sext_v16i8
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}
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define i32 @extract_sext_v8i16() nounwind {
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@ -282,7 +273,6 @@ define i32 @extract_sext_v8i16() nounwind {
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; MIPS32-AE-NOT: sra
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ret i32 %4
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; MIPS32-AE: .size extract_sext_v8i16
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}
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define i32 @extract_sext_v4i32() nounwind {
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@ -298,7 +288,6 @@ define i32 @extract_sext_v4i32() nounwind {
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; MIPS32-AE-DAG: copy_s.w [[R3:\$[0-9]+]], [[R1]][1]
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ret i32 %3
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; MIPS32-AE: .size extract_sext_v4i32
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}
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define i64 @extract_sext_v2i64() nounwind {
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@ -317,7 +306,6 @@ define i64 @extract_sext_v2i64() nounwind {
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; MIPS32-AE-NOT: sra
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ret i64 %3
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; MIPS32-AE: .size extract_sext_v2i64
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}
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define i32 @extract_zext_v16i8() nounwind {
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@ -335,7 +323,6 @@ define i32 @extract_zext_v16i8() nounwind {
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; MIPS32-AE-NOT: andi
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ret i32 %4
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; MIPS32-AE: .size extract_zext_v16i8
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}
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define i32 @extract_zext_v8i16() nounwind {
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@ -353,7 +340,6 @@ define i32 @extract_zext_v8i16() nounwind {
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; MIPS32-AE-NOT: andi
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ret i32 %4
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; MIPS32-AE: .size extract_zext_v8i16
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}
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define i32 @extract_zext_v4i32() nounwind {
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@ -369,7 +355,6 @@ define i32 @extract_zext_v4i32() nounwind {
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; MIPS32-AE-DAG: copy_{{[su]}}.w [[R3:\$[0-9]+]], [[R1]][1]
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ret i32 %3
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; MIPS32-AE: .size extract_zext_v4i32
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}
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define i64 @extract_zext_v2i64() nounwind {
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@ -387,7 +372,6 @@ define i64 @extract_zext_v2i64() nounwind {
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; MIPS32-AE-NOT: andi
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ret i64 %3
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; MIPS32-AE: .size extract_zext_v2i64
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}
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define i32 @extract_sext_v16i8_vidx() nounwind {
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@ -411,7 +395,6 @@ define i32 @extract_sext_v16i8_vidx() nounwind {
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; MIPS32-AE-DAG: sra [[R6:\$[0-9]+]], [[R5]], 24
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ret i32 %5
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; MIPS32-AE: .size extract_sext_v16i8_vidx
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}
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define i32 @extract_sext_v8i16_vidx() nounwind {
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@ -435,7 +418,6 @@ define i32 @extract_sext_v8i16_vidx() nounwind {
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; MIPS32-AE-DAG: sra [[R6:\$[0-9]+]], [[R5]], 16
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ret i32 %5
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; MIPS32-AE: .size extract_sext_v8i16_vidx
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}
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define i32 @extract_sext_v4i32_vidx() nounwind {
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@ -458,7 +440,6 @@ define i32 @extract_sext_v4i32_vidx() nounwind {
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; MIPS32-AE-NOT: sra
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ret i32 %4
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; MIPS32-AE: .size extract_sext_v4i32_vidx
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}
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define i64 @extract_sext_v2i64_vidx() nounwind {
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@ -483,7 +464,6 @@ define i64 @extract_sext_v2i64_vidx() nounwind {
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; MIPS32-AE-NOT: sra
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ret i64 %4
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; MIPS32-AE: .size extract_sext_v2i64_vidx
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}
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define i32 @extract_zext_v16i8_vidx() nounwind {
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@ -507,7 +487,6 @@ define i32 @extract_zext_v16i8_vidx() nounwind {
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; MIPS32-AE-DAG: srl [[R6:\$[0-9]+]], [[R5]], 24
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ret i32 %5
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; MIPS32-AE: .size extract_zext_v16i8_vidx
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}
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define i32 @extract_zext_v8i16_vidx() nounwind {
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@ -531,7 +510,6 @@ define i32 @extract_zext_v8i16_vidx() nounwind {
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; MIPS32-AE-DAG: srl [[R6:\$[0-9]+]], [[R5]], 16
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ret i32 %5
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; MIPS32-AE: .size extract_zext_v8i16_vidx
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}
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define i32 @extract_zext_v4i32_vidx() nounwind {
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@ -554,7 +532,6 @@ define i32 @extract_zext_v4i32_vidx() nounwind {
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; MIPS32-AE-NOT: srl
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ret i32 %4
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; MIPS32-AE: .size extract_zext_v4i32_vidx
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}
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define i64 @extract_zext_v2i64_vidx() nounwind {
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@ -579,7 +556,6 @@ define i64 @extract_zext_v2i64_vidx() nounwind {
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; MIPS32-AE-NOT: srl
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ret i64 %4
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; MIPS32-AE: .size extract_zext_v2i64_vidx
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}
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define void @insert_v16i8(i32 signext %a) nounwind {
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@ -601,7 +577,6 @@ define void @insert_v16i8(i32 signext %a) nounwind {
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; MIPS32-AE-DAG: st.b [[R1]]
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ret void
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; MIPS32-AE: .size insert_v16i8
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}
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define void @insert_v8i16(i32 signext %a) nounwind {
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@ -623,7 +598,6 @@ define void @insert_v8i16(i32 signext %a) nounwind {
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; MIPS32-AE-DAG: st.h [[R1]]
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ret void
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; MIPS32-AE: .size insert_v8i16
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}
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define void @insert_v4i32(i32 signext %a) nounwind {
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@ -642,7 +616,6 @@ define void @insert_v4i32(i32 signext %a) nounwind {
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; MIPS32-AE-DAG: st.w [[R1]]
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ret void
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; MIPS32-AE: .size insert_v4i32
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}
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define void @insert_v2i64(i64 signext %a) nounwind {
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@ -662,11 +635,10 @@ define void @insert_v2i64(i64 signext %a) nounwind {
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; MIPS32-AE-DAG: st.w [[R1]]
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ret void
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; MIPS32-AE: .size insert_v2i64
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}
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define void @insert_v16i8_vidx(i32 signext %a) nounwind {
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; MIPS32-AE: insert_v16i8_vidx:
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; MIPS32-AE-LABEL: insert_v16i8_vidx:
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%1 = load <16 x i8>, <16 x i8>* @v16i8
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; MIPS32-AE-DAG: ld.b [[R1:\$w[0-9]+]],
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@ -691,11 +663,10 @@ define void @insert_v16i8_vidx(i32 signext %a) nounwind {
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; MIPS32-AE-DAG: st.b [[R1]]
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ret void
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; MIPS32-AE: .size insert_v16i8_vidx
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}
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define void @insert_v8i16_vidx(i32 signext %a) nounwind {
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; MIPS32-AE: insert_v8i16_vidx:
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define void @insert_v8i16_vidx(i32 %a) nounwind {
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; MIPS32-AE-LABEL: insert_v8i16_vidx:
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%1 = load <8 x i16>, <8 x i16>* @v8i16
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; MIPS32-AE-DAG: ld.h [[R1:\$w[0-9]+]],
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@ -721,11 +692,10 @@ define void @insert_v8i16_vidx(i32 signext %a) nounwind {
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; MIPS32-AE-DAG: st.h [[R1]]
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ret void
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; MIPS32-AE: .size insert_v8i16_vidx
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}
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define void @insert_v4i32_vidx(i32 signext %a) nounwind {
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; MIPS32-AE: insert_v4i32_vidx:
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; MIPS32-AE-LABEL: insert_v4i32_vidx:
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%1 = load <4 x i32>, <4 x i32>* @v4i32
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; MIPS32-AE-DAG: ld.w [[R1:\$w[0-9]+]],
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@ -748,11 +718,10 @@ define void @insert_v4i32_vidx(i32 signext %a) nounwind {
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; MIPS32-AE-DAG: st.w [[R1]]
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ret void
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; MIPS32-AE: .size insert_v4i32_vidx
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}
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define void @insert_v2i64_vidx(i64 signext %a) nounwind {
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; MIPS32-AE: insert_v2i64_vidx:
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; MIPS32-AE-LABEL: insert_v2i64_vidx:
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%1 = load <2 x i64>, <2 x i64>* @v2i64
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; MIPS32-AE-DAG: ld.w [[R1:\$w[0-9]+]],
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@ -785,7 +754,6 @@ define void @insert_v2i64_vidx(i64 signext %a) nounwind {
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; MIPS32-AE-DAG: st.w [[R1]]
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ret void
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; MIPS32-AE: .size insert_v2i64_vidx
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}
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define void @truncstore() nounwind {
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@ -795,5 +763,4 @@ define void @truncstore() nounwind {
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; TODO: What code should be emitted?
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ret void
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; MIPS32-AE: .size truncstore
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}
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@ -35,7 +35,6 @@ define void @const_v4f32() nounwind {
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; MIPS32: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
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ret void
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; MIPS32: .size const_v4f32
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}
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define void @const_v2f64() nounwind {
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@ -69,7 +68,6 @@ define void @const_v2f64() nounwind {
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; MIPS32: ld.d [[R1:\$w[0-9]+]], 0([[G_PTR]])
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ret void
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; MIPS32: .size const_v2f64
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}
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define void @nonconst_v4f32() nounwind {
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@ -85,7 +83,6 @@ define void @nonconst_v4f32() nounwind {
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; MIPS32: splati.w [[R2:\$w[0-9]+]], $w[[R1]]
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ret void
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; MIPS32: .size nonconst_v4f32
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}
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define void @nonconst_v2f64() nounwind {
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@ -99,7 +96,6 @@ define void @nonconst_v2f64() nounwind {
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; MIPS32: splati.d [[R2:\$w[0-9]+]], $w[[R1]]
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ret void
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; MIPS32: .size nonconst_v2f64
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}
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define float @extract_v4f32() nounwind {
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@ -117,7 +113,6 @@ define float @extract_v4f32() nounwind {
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; MIPS32-DAG: splati.w $w0, [[R1]][1]
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ret float %3
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; MIPS32: .size extract_v4f32
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}
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define float @extract_v4f32_elt0() nounwind {
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@ -135,7 +130,6 @@ define float @extract_v4f32_elt0() nounwind {
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; MIPS32-NOT: mtc1
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ret float %3
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; MIPS32: .size extract_v4f32_elt0
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}
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define float @extract_v4f32_elt2() nounwind {
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@ -153,7 +147,6 @@ define float @extract_v4f32_elt2() nounwind {
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; MIPS32-DAG: splati.w $w0, [[R1]][2]
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ret float %3
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; MIPS32: .size extract_v4f32_elt2
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}
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define float @extract_v4f32_vidx() nounwind {
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@ -174,7 +167,6 @@ define float @extract_v4f32_vidx() nounwind {
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; MIPS32-DAG: splat.w $w0, [[R1]]{{\[}}[[IDX]]]
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ret float %4
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; MIPS32: .size extract_v4f32_vidx
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}
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define double @extract_v2f64() nounwind {
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@ -197,7 +189,6 @@ define double @extract_v2f64() nounwind {
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; MIPS32-NOT: sra
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ret double %3
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; MIPS32: .size extract_v2f64
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}
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define double @extract_v2f64_elt0() nounwind {
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@ -218,7 +209,6 @@ define double @extract_v2f64_elt0() nounwind {
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; MIPS32-NOT: sra
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ret double %3
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; MIPS32: .size extract_v2f64_elt0
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}
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define double @extract_v2f64_vidx() nounwind {
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@ -239,7 +229,6 @@ define double @extract_v2f64_vidx() nounwind {
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; MIPS32-DAG: splat.d $w0, [[R1]]{{\[}}[[IDX]]]
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ret double %4
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; MIPS32: .size extract_v2f64_vidx
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}
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define void @insert_v4f32(float %a) nounwind {
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@ -256,7 +245,6 @@ define void @insert_v4f32(float %a) nounwind {
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; MIPS32-DAG: st.w [[R1]]
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ret void
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; MIPS32: .size insert_v4f32
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}
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define void @insert_v2f64(double %a) nounwind {
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@ -273,7 +261,6 @@ define void @insert_v2f64(double %a) nounwind {
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; MIPS32-DAG: st.d [[R1]]
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ret void
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; MIPS32: .size insert_v2f64
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}
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define void @insert_v4f32_vidx(float %a) nounwind {
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@ -299,7 +286,6 @@ define void @insert_v4f32_vidx(float %a) nounwind {
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; MIPS32-DAG: st.w [[R1]]
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ret void
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; MIPS32: .size insert_v4f32_vidx
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}
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define void @insert_v2f64_vidx(double %a) nounwind {
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@ -325,5 +311,4 @@ define void @insert_v2f64_vidx(double %a) nounwind {
|
||||
; MIPS32-DAG: st.d [[R1]]
|
||||
|
||||
ret void
|
||||
; MIPS32: .size insert_v2f64_vidx
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user