Doxygenify the comments of ISD nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160623 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem
2012-07-23 09:04:00 +00:00
parent c8e41c5917
commit f4341e4155

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@ -37,87 +37,87 @@ namespace ISD {
/// and getMachineOpcode() member functions of SDNode. /// and getMachineOpcode() member functions of SDNode.
/// ///
enum NodeType { enum NodeType {
// DELETED_NODE - This is an illegal value that is used to catch /// DELETED_NODE - This is an illegal value that is used to catch
// errors. This opcode is not a legal opcode for any node. /// errors. This opcode is not a legal opcode for any node.
DELETED_NODE, DELETED_NODE,
// EntryToken - This is the marker used to indicate the start of the region. /// EntryToken - This is the marker used to indicate the start of a region.
EntryToken, EntryToken,
// TokenFactor - This node takes multiple tokens as input and produces a /// TokenFactor - This node takes multiple tokens as input and produces a
// single token result. This is used to represent the fact that the operand /// single token result. This is used to represent the fact that the operand
// operators are independent of each other. /// operators are independent of each other.
TokenFactor, TokenFactor,
// AssertSext, AssertZext - These nodes record if a register contains a /// AssertSext, AssertZext - These nodes record if a register contains a
// value that has already been zero or sign extended from a narrower type. /// value that has already been zero or sign extended from a narrower type.
// These nodes take two operands. The first is the node that has already /// These nodes take two operands. The first is the node that has already
// been extended, and the second is a value type node indicating the width /// been extended, and the second is a value type node indicating the width
// of the extension /// of the extension
AssertSext, AssertZext, AssertSext, AssertZext,
// Various leaf nodes. /// Various leaf nodes.
BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask,
Constant, ConstantFP, Constant, ConstantFP,
GlobalAddress, GlobalTLSAddress, FrameIndex, GlobalAddress, GlobalTLSAddress, FrameIndex,
JumpTable, ConstantPool, ExternalSymbol, BlockAddress, JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
// The address of the GOT /// The address of the GOT
GLOBAL_OFFSET_TABLE, GLOBAL_OFFSET_TABLE,
// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
// llvm.returnaddress on the DAG. These nodes take one operand, the index /// llvm.returnaddress on the DAG. These nodes take one operand, the index
// of the frame or return address to return. An index of zero corresponds /// of the frame or return address to return. An index of zero corresponds
// to the current function's frame or return address, an index of one to the /// to the current function's frame or return address, an index of one to
// parent's frame or return address, and so on. /// the parent's frame or return address, and so on.
FRAMEADDR, RETURNADDR, FRAMEADDR, RETURNADDR,
// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
// first (possible) on-stack argument. This is needed for correct stack /// first (possible) on-stack argument. This is needed for correct stack
// adjustment during unwind. /// adjustment during unwind.
FRAME_TO_ARGS_OFFSET, FRAME_TO_ARGS_OFFSET,
// RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the /// RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the
// address of the exception block on entry to an landing pad block. /// address of the exception block on entry to an landing pad block.
EXCEPTIONADDR, EXCEPTIONADDR,
// RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the /// RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the
// address of the Language Specific Data Area for the enclosing function. /// address of the Language Specific Data Area for the enclosing function.
LSDAADDR, LSDAADDR,
// RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents /// RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node
// the selection index of the exception thrown. /// represents the selection index of the exception thrown.
EHSELECTION, EHSELECTION,
// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
// 'eh_return' gcc dwarf builtin, which is used to return from /// 'eh_return' gcc dwarf builtin, which is used to return from
// exception. The general meaning is: adjust stack by OFFSET and pass /// exception. The general meaning is: adjust stack by OFFSET and pass
// execution to HANDLER. Many platform-related details also :) /// execution to HANDLER. Many platform-related details also :)
EH_RETURN, EH_RETURN,
// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
// This corresponds to the eh.sjlj.setjmp intrinsic. /// This corresponds to the eh.sjlj.setjmp intrinsic.
// It takes an input chain and a pointer to the jump buffer as inputs /// It takes an input chain and a pointer to the jump buffer as inputs
// and returns an outchain. /// and returns an outchain.
EH_SJLJ_SETJMP, EH_SJLJ_SETJMP,
// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
// This corresponds to the eh.sjlj.longjmp intrinsic. /// This corresponds to the eh.sjlj.longjmp intrinsic.
// It takes an input chain and a pointer to the jump buffer as inputs /// It takes an input chain and a pointer to the jump buffer as inputs
// and returns an outchain. /// and returns an outchain.
EH_SJLJ_LONGJMP, EH_SJLJ_LONGJMP,
// TargetConstant* - Like Constant*, but the DAG does not do any folding, /// TargetConstant* - Like Constant*, but the DAG does not do any folding,
// simplification, or lowering of the constant. They are used for constants /// simplification, or lowering of the constant. They are used for constants
// which are known to fit in the immediate fields of their users, or for /// which are known to fit in the immediate fields of their users, or for
// carrying magic numbers which are not values which need to be materialized /// carrying magic numbers which are not values which need to be
// in registers. /// materialized in registers.
TargetConstant, TargetConstant,
TargetConstantFP, TargetConstantFP,
// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
// anything else with this node, and this is valid in the target-specific /// anything else with this node, and this is valid in the target-specific
// dag, turning into a GlobalAddress operand. /// dag, turning into a GlobalAddress operand.
TargetGlobalAddress, TargetGlobalAddress,
TargetGlobalTLSAddress, TargetGlobalTLSAddress,
TargetFrameIndex, TargetFrameIndex,
@ -148,93 +148,94 @@ namespace ISD {
/// namespace. The operands to the intrinsic follow. /// namespace. The operands to the intrinsic follow.
INTRINSIC_VOID, INTRINSIC_VOID,
// CopyToReg - This node has three operands: a chain, a register number to /// CopyToReg - This node has three operands: a chain, a register number to
// set to this value, and a value. /// set to this value, and a value.
CopyToReg, CopyToReg,
// CopyFromReg - This node indicates that the input value is a virtual or /// CopyFromReg - This node indicates that the input value is a virtual or
// physical register that is defined outside of the scope of this /// physical register that is defined outside of the scope of this
// SelectionDAG. The register is available from the RegisterSDNode object. /// SelectionDAG. The register is available from the RegisterSDNode object.
CopyFromReg, CopyFromReg,
// UNDEF - An undefined node /// UNDEF - An undefined node.
UNDEF, UNDEF,
// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
// a Constant, which is required to be operand #1) half of the integer or /// a Constant, which is required to be operand #1) half of the integer or
// float value specified as operand #0. This is only for use before /// float value specified as operand #0. This is only for use before
// legalization, for values that will be broken into multiple registers. /// legalization, for values that will be broken into multiple registers.
EXTRACT_ELEMENT, EXTRACT_ELEMENT,
// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
// two values of the same integer value type, this produces a value twice as /// Given two values of the same integer value type, this produces a value
// big. Like EXTRACT_ELEMENT, this can only be used before legalization. /// twice as big. Like EXTRACT_ELEMENT, this can only be used before
/// legalization.
BUILD_PAIR, BUILD_PAIR,
// MERGE_VALUES - This node takes multiple discrete operands and returns /// MERGE_VALUES - This node takes multiple discrete operands and returns
// them all as its individual results. This nodes has exactly the same /// them all as its individual results. This nodes has exactly the same
// number of inputs and outputs. This node is useful for some pieces of the /// number of inputs and outputs. This node is useful for some pieces of the
// code generator that want to think about a single node with multiple /// code generator that want to think about a single node with multiple
// results, not multiple nodes. /// results, not multiple nodes.
MERGE_VALUES, MERGE_VALUES,
// Simple integer binary arithmetic operators. /// Simple integer binary arithmetic operators.
ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
// a signed/unsigned value of type i[2*N], and return the full value as /// a signed/unsigned value of type i[2*N], and return the full value as
// two results, each of type iN. /// two results, each of type iN.
SMUL_LOHI, UMUL_LOHI, SMUL_LOHI, UMUL_LOHI,
// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
// remainder result. /// remainder result.
SDIVREM, UDIVREM, SDIVREM, UDIVREM,
// CARRY_FALSE - This node is used when folding other nodes, /// CARRY_FALSE - This node is used when folding other nodes,
// like ADDC/SUBC, which indicate the carry result is always false. /// like ADDC/SUBC, which indicate the carry result is always false.
CARRY_FALSE, CARRY_FALSE,
// Carry-setting nodes for multiple precision addition and subtraction. /// Carry-setting nodes for multiple precision addition and subtraction.
// These nodes take two operands of the same value type, and produce two /// These nodes take two operands of the same value type, and produce two
// results. The first result is the normal add or sub result, the second /// results. The first result is the normal add or sub result, the second
// result is the carry flag result. /// result is the carry flag result.
ADDC, SUBC, ADDC, SUBC,
// Carry-using nodes for multiple precision addition and subtraction. These /// Carry-using nodes for multiple precision addition and subtraction. These
// nodes take three operands: The first two are the normal lhs and rhs to /// nodes take three operands: The first two are the normal lhs and rhs to
// the add or sub, and the third is the input carry flag. These nodes /// the add or sub, and the third is the input carry flag. These nodes
// produce two results; the normal result of the add or sub, and the output /// produce two results; the normal result of the add or sub, and the output
// carry flag. These nodes both read and write a carry flag to allow them /// carry flag. These nodes both read and write a carry flag to allow them
// to them to be chained together for add and sub of arbitrarily large /// to them to be chained together for add and sub of arbitrarily large
// values. /// values.
ADDE, SUBE, ADDE, SUBE,
// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
// These nodes take two operands: the normal LHS and RHS to the add. They /// These nodes take two operands: the normal LHS and RHS to the add. They
// produce two results: the normal result of the add, and a boolean that /// produce two results: the normal result of the add, and a boolean that
// indicates if an overflow occurred (*not* a flag, because it may be stored /// indicates if an overflow occurred (*not* a flag, because it may be store
// to memory, etc.). If the type of the boolean is not i1 then the high /// to memory, etc.). If the type of the boolean is not i1 then the high
// bits conform to getBooleanContents. /// bits conform to getBooleanContents.
// These nodes are generated from the llvm.[su]add.with.overflow intrinsics. /// These nodes are generated from llvm.[su]add.with.overflow intrinsics.
SADDO, UADDO, SADDO, UADDO,
// Same for subtraction /// Same for subtraction.
SSUBO, USUBO, SSUBO, USUBO,
// Same for multiplication /// Same for multiplication.
SMULO, UMULO, SMULO, UMULO,
// Simple binary floating point operators. /// Simple binary floating point operators.
FADD, FSUB, FMUL, FMA, FDIV, FREM, FADD, FSUB, FMUL, FMA, FDIV, FREM,
// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
// DAG node does not require that X and Y have the same type, just that they /// DAG node does not require that X and Y have the same type, just that the
// are both floating point. X and the result must have the same type. /// are both floating point. X and the result must have the same type.
// FCOPYSIGN(f32, f64) is allowed. /// FCOPYSIGN(f32, f64) is allowed.
FCOPYSIGN, FCOPYSIGN,
// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
// value as an integer 0/1 value. /// value as an integer 0/1 value.
FGETSIGN, FGETSIGN,
/// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
@ -292,8 +293,9 @@ namespace ISD {
/// than the vector element type, and is implicitly truncated to it. /// than the vector element type, and is implicitly truncated to it.
SCALAR_TO_VECTOR, SCALAR_TO_VECTOR,
// MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing /// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
// an unsigned/signed value of type i[2*N], then return the top part. /// producing an unsigned/signed value of type i[2*N], then return the top
/// part.
MULHU, MULHS, MULHU, MULHS,
/// Bitwise operators - logical and, logical or, logical xor. /// Bitwise operators - logical and, logical or, logical xor.
@ -306,7 +308,6 @@ namespace ISD {
/// legalization, types like i1024 can occur and i8 doesn't have enough bits /// legalization, types like i1024 can occur and i8 doesn't have enough bits
/// to represent the shift amount. By convention, DAGCombine and /// to represent the shift amount. By convention, DAGCombine and
/// SelectionDAGBuilder forces these shift amounts to i32 for simplicity. /// SelectionDAGBuilder forces these shift amounts to i32 for simplicity.
///
SHL, SRA, SRL, ROTL, ROTR, SHL, SRA, SRL, ROTL, ROTR,
/// Byte Swap and Counting operators. /// Byte Swap and Counting operators.
@ -315,67 +316,67 @@ namespace ISD {
/// Bit counting operators with an undefined result for zero inputs. /// Bit counting operators with an undefined result for zero inputs.
CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF,
// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not /// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
// i1 then the high bits must conform to getBooleanContents. /// i1 then the high bits must conform to getBooleanContents.
SELECT, SELECT,
// Select with a vector condition (op #0) and two vector operands (ops #1 /// Select with a vector condition (op #0) and two vector operands (ops #1
// and #2), returning a vector result. All vectors have the same length. /// and #2), returning a vector result. All vectors have the same length.
// Much like the scalar select and setcc, each bit in the condition selects /// Much like the scalar select and setcc, each bit in the condition selects
// whether the corresponding result element is taken from op #1 or op #2. /// whether the corresponding result element is taken from op #1 or op #2.
// At first, the VSELECT condition is of vXi1 type. Later, targets may change /// At first, the VSELECT condition is of vXi1 type. Later, targets may
// the condition type in order to match the VSELECT node using a a pattern. /// change the condition type in order to match the VSELECT node using a
// The condition follows the BooleanContent format of the target. /// pattern. The condition follows the BooleanContent format of the target.
VSELECT, VSELECT,
// Select with condition operator - This selects between a true value and /// Select with condition operator - This selects between a true value and
// a false value (ops #2 and #3) based on the boolean result of comparing /// a false value (ops #2 and #3) based on the boolean result of comparing
// the lhs and rhs (ops #0 and #1) of a conditional expression with the /// the lhs and rhs (ops #0 and #1) of a conditional expression with the
// condition code in op #4, a CondCodeSDNode. /// condition code in op #4, a CondCodeSDNode.
SELECT_CC, SELECT_CC,
// SetCC operator - This evaluates to a true value iff the condition is /// SetCC operator - This evaluates to a true value iff the condition is
// true. If the result value type is not i1 then the high bits conform /// true. If the result value type is not i1 then the high bits conform
// to getBooleanContents. The operands to this are the left and right /// to getBooleanContents. The operands to this are the left and right
// operands to compare (ops #0, and #1) and the condition code to compare /// operands to compare (ops #0, and #1) and the condition code to compare
// them with (op #2) as a CondCodeSDNode. If the operands are vector types /// them with (op #2) as a CondCodeSDNode. If the operands are vector types
// then the result type must also be a vector type. /// then the result type must also be a vector type.
SETCC, SETCC,
// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
// integer shift operations, just like ADD/SUB_PARTS. The operation /// integer shift operations, just like ADD/SUB_PARTS. The operation
// ordering is: /// ordering is:
// [Lo,Hi] = op [LoLHS,HiLHS], Amt /// [Lo,Hi] = op [LoLHS,HiLHS], Amt
SHL_PARTS, SRA_PARTS, SRL_PARTS, SHL_PARTS, SRA_PARTS, SRL_PARTS,
// Conversion operators. These are all single input single output /// Conversion operators. These are all single input single output
// operations. For all of these, the result type must be strictly /// operations. For all of these, the result type must be strictly
// wider or narrower (depending on the operation) than the source /// wider or narrower (depending on the operation) than the source
// type. /// type.
// SIGN_EXTEND - Used for integer types, replicating the sign bit /// SIGN_EXTEND - Used for integer types, replicating the sign bit
// into new bits. /// into new bits.
SIGN_EXTEND, SIGN_EXTEND,
// ZERO_EXTEND - Used for integer types, zeroing the new bits. /// ZERO_EXTEND - Used for integer types, zeroing the new bits.
ZERO_EXTEND, ZERO_EXTEND,
// ANY_EXTEND - Used for integer types. The high bits are undefined. /// ANY_EXTEND - Used for integer types. The high bits are undefined.
ANY_EXTEND, ANY_EXTEND,
// TRUNCATE - Completely drop the high bits. /// TRUNCATE - Completely drop the high bits.
TRUNCATE, TRUNCATE,
// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
// depends on the first letter) to floating point. /// depends on the first letter) to floating point.
SINT_TO_FP, SINT_TO_FP,
UINT_TO_FP, UINT_TO_FP,
// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
// sign extend a small value in a large integer register (e.g. sign /// sign extend a small value in a large integer register (e.g. sign
// extending the low 8 bits of a 32-bit register to fill the top 24 bits /// extending the low 8 bits of a 32-bit register to fill the top 24 bits
// with the 7th bit). The size of the smaller type is indicated by the 1th /// with the 7th bit). The size of the smaller type is indicated by the 1th
// operand, a ValueType node. /// operand, a ValueType node.
SIGN_EXTEND_INREG, SIGN_EXTEND_INREG,
/// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
@ -396,12 +397,12 @@ namespace ISD {
/// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
FP_ROUND, FP_ROUND,
// FLT_ROUNDS_ - Returns current rounding mode: /// FLT_ROUNDS_ - Returns current rounding mode:
// -1 Undefined /// -1 Undefined
// 0 Round to 0 /// 0 Round to 0
// 1 Round to nearest /// 1 Round to nearest
// 2 Round to +inf /// 2 Round to +inf
// 3 Round to -inf /// 3 Round to -inf
FLT_ROUNDS_, FLT_ROUNDS_,
/// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
@ -414,211 +415,211 @@ namespace ISD {
/// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
FP_EXTEND, FP_EXTEND,
// BITCAST - This operator converts between integer, vector and FP /// BITCAST - This operator converts between integer, vector and FP
// values, as if the value was stored to memory with one type and loaded /// values, as if the value was stored to memory with one type and loaded
// from the same address with the other type (or equivalently for vector /// from the same address with the other type (or equivalently for vector
// format conversions, etc). The source and result are required to have /// format conversions, etc). The source and result are required to have
// the same bit size (e.g. f32 <-> i32). This can also be used for /// the same bit size (e.g. f32 <-> i32). This can also be used for
// int-to-int or fp-to-fp conversions, but that is a noop, deleted by /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by
// getNode(). /// getNode().
BITCAST, BITCAST,
// CONVERT_RNDSAT - This operator is used to support various conversions /// CONVERT_RNDSAT - This operator is used to support various conversions
// between various types (float, signed, unsigned and vectors of those /// between various types (float, signed, unsigned and vectors of those
// types) with rounding and saturation. NOTE: Avoid using this operator as /// types) with rounding and saturation. NOTE: Avoid using this operator as
// most target don't support it and the operator might be removed in the /// most target don't support it and the operator might be removed in the
// future. It takes the following arguments: /// future. It takes the following arguments:
// 0) value /// 0) value
// 1) dest type (type to convert to) /// 1) dest type (type to convert to)
// 2) src type (type to convert from) /// 2) src type (type to convert from)
// 3) rounding imm /// 3) rounding imm
// 4) saturation imm /// 4) saturation imm
// 5) ISD::CvtCode indicating the type of conversion to do /// 5) ISD::CvtCode indicating the type of conversion to do
CONVERT_RNDSAT, CONVERT_RNDSAT,
// FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform /// FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
// promotions and truncation for half-precision (16 bit) floating /// promotions and truncation for half-precision (16 bit) floating
// numbers. We need special nodes since FP16 is a storage-only type with /// numbers. We need special nodes since FP16 is a storage-only type with
// special semantics of operations. /// special semantics of operations.
FP16_TO_FP32, FP32_TO_FP16, FP16_TO_FP32, FP32_TO_FP16,
// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
// FLOG, FLOG2, FLOG10, FEXP, FEXP2, /// FLOG, FLOG2, FLOG10, FEXP, FEXP2,
// FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating /// FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary
// point operations. These are inspired by libm. /// floating point operations. These are inspired by libm.
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
FLOG, FLOG2, FLOG10, FEXP, FEXP2, FLOG, FLOG2, FLOG10, FEXP, FEXP2,
FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR, FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,
// LOAD and STORE have token chains as their first operand, then the same /// LOAD and STORE have token chains as their first operand, then the same
// operands as an LLVM load/store instruction, then an offset node that /// operands as an LLVM load/store instruction, then an offset node that
// is added / subtracted from the base pointer to form the address (for /// is added / subtracted from the base pointer to form the address (for
// indexed memory ops). /// indexed memory ops).
LOAD, STORE, LOAD, STORE,
// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
// to a specified boundary. This node always has two return values: a new /// to a specified boundary. This node always has two return values: a new
// stack pointer value and a chain. The first operand is the token chain, /// stack pointer value and a chain. The first operand is the token chain,
// the second is the number of bytes to allocate, and the third is the /// the second is the number of bytes to allocate, and the third is the
// alignment boundary. The size is guaranteed to be a multiple of the stack /// alignment boundary. The size is guaranteed to be a multiple of the
// alignment, and the alignment is guaranteed to be bigger than the stack /// stack alignment, and the alignment is guaranteed to be bigger than the
// alignment (if required) or 0 to get standard stack alignment. /// stack alignment (if required) or 0 to get standard stack alignment.
DYNAMIC_STACKALLOC, DYNAMIC_STACKALLOC,
// Control flow instructions. These all have token chains. /// Control flow instructions. These all have token chains.
// BR - Unconditional branch. The first operand is the chain /// BR - Unconditional branch. The first operand is the chain
// operand, the second is the MBB to branch to. /// operand, the second is the MBB to branch to.
BR, BR,
// BRIND - Indirect branch. The first operand is the chain, the second /// BRIND - Indirect branch. The first operand is the chain, the second
// is the value to branch to, which must be of the same type as the target's /// is the value to branch to, which must be of the same type as the
// pointer type. /// target's pointer type.
BRIND, BRIND,
// BR_JT - Jumptable branch. The first operand is the chain, the second /// BR_JT - Jumptable branch. The first operand is the chain, the second
// is the jumptable index, the last one is the jumptable entry index. /// is the jumptable index, the last one is the jumptable entry index.
BR_JT, BR_JT,
// BRCOND - Conditional branch. The first operand is the chain, the /// BRCOND - Conditional branch. The first operand is the chain, the
// second is the condition, the third is the block to branch to if the /// second is the condition, the third is the block to branch to if the
// condition is true. If the type of the condition is not i1, then the /// condition is true. If the type of the condition is not i1, then the
// high bits must conform to getBooleanContents. /// high bits must conform to getBooleanContents.
BRCOND, BRCOND,
// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
// that the condition is represented as condition code, and two nodes to /// that the condition is represented as condition code, and two nodes to
// compare, rather than as a combined SetCC node. The operands in order are /// compare, rather than as a combined SetCC node. The operands in order
// chain, cc, lhs, rhs, block to branch to if condition is true. /// are chain, cc, lhs, rhs, block to branch to if condition is true.
BR_CC, BR_CC,
// INLINEASM - Represents an inline asm block. This node always has two /// INLINEASM - Represents an inline asm block. This node always has two
// return values: a chain and a flag result. The inputs are as follows: /// return values: a chain and a flag result. The inputs are as follows:
// Operand #0 : Input chain. /// Operand #0 : Input chain.
// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. /// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
// Operand #2 : a MDNodeSDNode with the !srcloc metadata. /// Operand #2 : a MDNodeSDNode with the !srcloc metadata.
// Operand #3 : HasSideEffect, IsAlignStack bits. /// Operand #3 : HasSideEffect, IsAlignStack bits.
// After this, it is followed by a list of operands with this format: /// After this, it is followed by a list of operands with this format:
// ConstantSDNode: Flags that encode whether it is a mem or not, the /// ConstantSDNode: Flags that encode whether it is a mem or not, the
// of operands that follow, etc. See InlineAsm.h. /// of operands that follow, etc. See InlineAsm.h.
// ... however many operands ... /// ... however many operands ...
// Operand #last: Optional, an incoming flag. /// Operand #last: Optional, an incoming flag.
// ///
// The variable width operands are required to represent target addressing /// The variable width operands are required to represent target addressing
// modes as a single "operand", even though they may have multiple /// modes as a single "operand", even though they may have multiple
// SDOperands. /// SDOperands.
INLINEASM, INLINEASM,
// EH_LABEL - Represents a label in mid basic block used to track /// EH_LABEL - Represents a label in mid basic block used to track
// locations needed for debug and exception handling tables. These nodes /// locations needed for debug and exception handling tables. These nodes
// take a chain as input and return a chain. /// take a chain as input and return a chain.
EH_LABEL, EH_LABEL,
// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a /// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
// value, the same type as the pointer type for the system, and an output /// value, the same type as the pointer type for the system, and an output
// chain. /// chain.
STACKSAVE, STACKSAVE,
// STACKRESTORE has two operands, an input chain and a pointer to restore to /// STACKRESTORE has two operands, an input chain and a pointer to restore
// it returns an output chain. /// to it returns an output chain.
STACKRESTORE, STACKRESTORE,
// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end
// a call sequence, and carry arbitrary information that target might want /// of a call sequence, and carry arbitrary information that target might
// to know. The first operand is a chain, the rest are specified by the /// want to know. The first operand is a chain, the rest are specified by
// target and not touched by the DAG optimizers. /// the target and not touched by the DAG optimizers.
// CALLSEQ_START..CALLSEQ_END pairs may not be nested. /// CALLSEQ_START..CALLSEQ_END pairs may not be nested.
CALLSEQ_START, // Beginning of a call sequence CALLSEQ_START, // Beginning of a call sequence
CALLSEQ_END, // End of a call sequence CALLSEQ_END, // End of a call sequence
// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
// and the alignment. It returns a pair of values: the vaarg value and a /// and the alignment. It returns a pair of values: the vaarg value and a
// new chain. /// new chain.
VAARG, VAARG,
// VACOPY - VACOPY has five operands: an input chain, a destination pointer, /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer,
// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
// source. /// source.
VACOPY, VACOPY,
// VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain,
// pointer, and a SRCVALUE. /// pointer, and a SRCVALUE.
VAEND, VASTART, VAEND, VASTART,
// SRCVALUE - This is a node type that holds a Value* that is used to /// SRCVALUE - This is a node type that holds a Value* that is used to
// make reference to a value in the LLVM IR. /// make reference to a value in the LLVM IR.
SRCVALUE, SRCVALUE,
// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
// reference metadata in the IR. /// reference metadata in the IR.
MDNODE_SDNODE, MDNODE_SDNODE,
// PCMARKER - This corresponds to the pcmarker intrinsic. /// PCMARKER - This corresponds to the pcmarker intrinsic.
PCMARKER, PCMARKER,
// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
// The only operand is a chain and a value and a chain are produced. The /// The only operand is a chain and a value and a chain are produced. The
// value is the contents of the architecture specific cycle counter like /// value is the contents of the architecture specific cycle counter like
// register (or other high accuracy low latency clock source) /// register (or other high accuracy low latency clock source)
READCYCLECOUNTER, READCYCLECOUNTER,
// HANDLENODE node - Used as a handle for various purposes. /// HANDLENODE node - Used as a handle for various purposes.
HANDLENODE, HANDLENODE,
// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It
// takes as input a token chain, the pointer to the trampoline, the pointer /// takes as input a token chain, the pointer to the trampoline, the pointer
// to the nested function, the pointer to pass for the 'nest' parameter, a /// to the nested function, the pointer to pass for the 'nest' parameter, a
// SRCVALUE for the trampoline and another for the nested function (allowing /// SRCVALUE for the trampoline and another for the nested function
// targets to access the original Function*). It produces a token chain as /// (allowing targets to access the original Function*).
// output. /// It produces a token chain as output.
INIT_TRAMPOLINE, INIT_TRAMPOLINE,
// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic. /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
// It takes a pointer to the trampoline and produces a (possibly) new /// It takes a pointer to the trampoline and produces a (possibly) new
// pointer to the same trampoline with platform-specific adjustments /// pointer to the same trampoline with platform-specific adjustments
// applied. The pointer it returns points to an executable block of code. /// applied. The pointer it returns points to an executable block of code.
ADJUST_TRAMPOLINE, ADJUST_TRAMPOLINE,
// TRAP - Trapping instruction /// TRAP - Trapping instruction
TRAP, TRAP,
// DEBUGTRAP - Trap intended to get the attention of a debugger. /// DEBUGTRAP - Trap intended to get the attention of a debugger.
DEBUGTRAP, DEBUGTRAP,
// PREFETCH - This corresponds to a prefetch intrinsic. The first operand /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand
// is the chain. The other operands are the address to prefetch, /// is the chain. The other operands are the address to prefetch,
// read / write specifier, locality specifier and instruction / data cache /// read / write specifier, locality specifier and instruction / data cache
// specifier. /// specifier.
PREFETCH, PREFETCH,
// OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load, /// OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load,
// store-store, device) /// store-store, device)
// This corresponds to the memory.barrier intrinsic. /// This corresponds to the memory.barrier intrinsic.
// it takes an input chain, 4 operands to specify the type of barrier, an /// it takes an input chain, 4 operands to specify the type of barrier, an
// operand specifying if the barrier applies to device and uncached memory /// operand specifying if the barrier applies to device and uncached memory
// and produces an output chain. /// and produces an output chain.
MEMBARRIER, MEMBARRIER,
// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope)
// This corresponds to the fence instruction. It takes an input chain, and /// This corresponds to the fence instruction. It takes an input chain, and
// two integer constants: an AtomicOrdering and a SynchronizationScope. /// two integer constants: an AtomicOrdering and a SynchronizationScope.
ATOMIC_FENCE, ATOMIC_FENCE,
// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr)
// This corresponds to "load atomic" instruction. /// This corresponds to "load atomic" instruction.
ATOMIC_LOAD, ATOMIC_LOAD,
// OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr, val) /// OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr, val)
// This corresponds to "store atomic" instruction. /// This corresponds to "store atomic" instruction.
ATOMIC_STORE, ATOMIC_STORE,
// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
// This corresponds to the cmpxchg instruction. /// This corresponds to the cmpxchg instruction.
ATOMIC_CMP_SWAP, ATOMIC_CMP_SWAP,
// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
// These correspond to the atomicrmw instruction. /// These correspond to the atomicrmw instruction.
ATOMIC_SWAP, ATOMIC_SWAP,
ATOMIC_LOAD_ADD, ATOMIC_LOAD_ADD,
ATOMIC_LOAD_SUB, ATOMIC_LOAD_SUB,
@ -793,16 +794,16 @@ namespace ISD {
/// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
/// supports. /// supports.
enum CvtCode { enum CvtCode {
CVT_FF, // Float from Float CVT_FF, /// Float from Float
CVT_FS, // Float from Signed CVT_FS, /// Float from Signed
CVT_FU, // Float from Unsigned CVT_FU, /// Float from Unsigned
CVT_SF, // Signed from Float CVT_SF, /// Signed from Float
CVT_UF, // Unsigned from Float CVT_UF, /// Unsigned from Float
CVT_SS, // Signed from Signed CVT_SS, /// Signed from Signed
CVT_SU, // Signed from Unsigned CVT_SU, /// Signed from Unsigned
CVT_US, // Unsigned from Signed CVT_US, /// Unsigned from Signed
CVT_UU, // Unsigned from Unsigned CVT_UU, /// Unsigned from Unsigned
CVT_INVALID // Marker - Invalid opcode CVT_INVALID /// Marker - Invalid opcode
}; };
} // end llvm::ISD namespace } // end llvm::ISD namespace