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Initial support for carrying MachineInstrs in SUnits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59278 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -94,6 +94,7 @@ namespace llvm {
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struct SUnit {
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private:
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SDNode *Node; // Representative node.
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MachineInstr *Instr; // Alternatively, a MachineInstr.
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public:
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SUnit *OrigNode; // If not this, the node from which
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// this node was cloned.
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@@ -128,19 +129,53 @@ namespace llvm {
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const TargetRegisterClass *CopyDstRC; // Is a special copy node if not null.
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const TargetRegisterClass *CopySrcRC;
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/// SUnit - Construct an SUnit for pre-regalloc scheduling to represent
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/// an SDNode and any nodes flagged to it.
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SUnit(SDNode *node, unsigned nodenum)
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: Node(node), OrigNode(0), NodeNum(nodenum), NodeQueueId(0), Latency(0),
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NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0),
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: Node(node), Instr(0), OrigNode(0), NodeNum(nodenum), NodeQueueId(0),
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Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0),
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isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false),
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isPending(false), isAvailable(false), isScheduled(false),
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CycleBound(0), Cycle(0), Depth(0), Height(0),
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CopyDstRC(NULL), CopySrcRC(NULL) {}
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/// SUnit - Construct an SUnit for post-regalloc scheduling to represent
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/// a MachineInstr.
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SUnit(MachineInstr *instr, unsigned nodenum)
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: Node(0), Instr(instr), OrigNode(0), NodeNum(nodenum), NodeQueueId(0),
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Latency(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), NumSuccsLeft(0),
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isTwoAddress(false), isCommutable(false), hasPhysRegDefs(false),
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isPending(false), isAvailable(false), isScheduled(false),
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CycleBound(0), Cycle(0), Depth(0), Height(0),
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CopyDstRC(NULL), CopySrcRC(NULL) {}
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/// setNode - Assign the representative SDNode for this SUnit.
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void setNode(SDNode *N) { Node = N; }
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/// This may be used during pre-regalloc scheduling.
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void setNode(SDNode *N) {
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assert(!Instr && "Setting SDNode of SUnit with MachineInstr!");
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Node = N;
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}
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/// getNode - Return the representative SDNode for this SUnit.
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SDNode *getNode() const { return Node; }
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/// This may be used during pre-regalloc scheduling.
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SDNode *getNode() const {
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assert(!Instr && "Reading SDNode of SUnit with MachineInstr!");
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return Node;
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}
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/// setInstr - Assign the instruction for the SUnit.
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/// This may be used during post-regalloc scheduling.
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void setInstr(MachineInstr *MI) {
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assert(!Node && "Setting MachineInstr of SUnit with SDNode!");
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Instr = MI;
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}
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/// getInstr - Return the representative MachineInstr for this SUnit.
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/// This may be used during post-regalloc scheduling.
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MachineInstr *getInstr() const {
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assert(!Node && "Reading MachineInstr of SUnit with SDNode!");
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return Instr;
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}
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/// addPred - This adds the specified node as a pred of the current node if
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/// not already. This returns true if this is a new pred.
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