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add and use ARMISD::RET_FLAG

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29499 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2006-08-03 17:02:20 +00:00
parent 202ae321f8
commit f4fda80403
2 changed files with 10 additions and 9 deletions
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15
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -52,7 +52,10 @@ namespace llvm {
// Start the numbering where the builting ops and target ops leave off.
FIRST_NUMBER = ISD::BUILTIN_OP_END+ARM::INSTRUCTION_LIST_END,
/// CALL - A direct function call.
CALL
CALL,
/// Return with a flag operand.
RET_FLAG
};
}
}
@ -61,6 +64,7 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
switch (Opcode) {
default: return 0;
case ARMISD::CALL: return "ARMISD::CALL";
case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG";
}
}
@ -175,13 +179,8 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
break;
}
SDOperand LR = DAG.getRegister(ARM::R14, MVT::i32);
//bug: the copy and branch should be linked with a flag so that the
//scheduller can't move an instruction that destroys R0 in between them
//return DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR, Copy.getValue(1));
return DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR);
//We must use RET_FLAG instead of BRIND because BRIND doesn't have a flag
return DAG.getNode(ARMISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1));
}
static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,

4
lib/Target/ARM/ARMInstrInfo.td
View File

@ -44,6 +44,8 @@ def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq, [SDNPHasChain]
def SDT_ARMcall : SDTypeProfile<0, -1, [SDTCisInt<0>]>;
def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall,
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
def retflag : SDNode<"ARMISD::RET_FLAG", SDTRet,
[SDNPHasChain, SDNPOptInFlag]>;
def ADJCALLSTACKUP : InstARM<(ops i32imm:$amt),
"!ADJCALLSTACKUP $amt",
@ -54,7 +56,7 @@ def ADJCALLSTACKDOWN : InstARM<(ops i32imm:$amt),
[(callseq_start imm:$amt)]>;
let isReturn = 1 in {
def bx: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>;
def bx: InstARM<(ops), "bx r14", [(retflag)]>;
}
let Defs = [R0, R1, R2, R3] in {