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add and use ARMISD::RET_FLAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29499 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -52,7 +52,10 @@ namespace llvm {
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// Start the numbering where the builting ops and target ops leave off.
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FIRST_NUMBER = ISD::BUILTIN_OP_END+ARM::INSTRUCTION_LIST_END,
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/// CALL - A direct function call.
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CALL
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CALL,
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/// Return with a flag operand.
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RET_FLAG
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};
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}
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}
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@ -61,6 +64,7 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
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switch (Opcode) {
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default: return 0;
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case ARMISD::CALL: return "ARMISD::CALL";
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case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG";
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}
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}
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@ -175,13 +179,8 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
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break;
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}
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SDOperand LR = DAG.getRegister(ARM::R14, MVT::i32);
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//bug: the copy and branch should be linked with a flag so that the
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//scheduller can't move an instruction that destroys R0 in between them
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//return DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR, Copy.getValue(1));
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return DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR);
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//We must use RET_FLAG instead of BRIND because BRIND doesn't have a flag
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return DAG.getNode(ARMISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1));
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}
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static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
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@ -44,6 +44,8 @@ def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq, [SDNPHasChain]
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def SDT_ARMcall : SDTypeProfile<0, -1, [SDTCisInt<0>]>;
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def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall,
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[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
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def retflag : SDNode<"ARMISD::RET_FLAG", SDTRet,
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[SDNPHasChain, SDNPOptInFlag]>;
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def ADJCALLSTACKUP : InstARM<(ops i32imm:$amt),
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"!ADJCALLSTACKUP $amt",
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@ -54,7 +56,7 @@ def ADJCALLSTACKDOWN : InstARM<(ops i32imm:$amt),
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[(callseq_start imm:$amt)]>;
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let isReturn = 1 in {
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def bx: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>;
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def bx: InstARM<(ops), "bx r14", [(retflag)]>;
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}
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let Defs = [R0, R1, R2, R3] in {
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