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CodeGen support for aggregate-value function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52156 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4573,10 +4573,15 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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unsigned j = 1;
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for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
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I != E; ++I, ++j) {
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MVT VT = getValueType(I->getType());
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SmallVector<MVT, 4> ValueVTs;
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ComputeValueVTs(*this, I->getType(), ValueVTs);
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for (unsigned Value = 0, NumValues = ValueVTs.size();
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Value != NumValues; ++Value) {
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MVT VT = ValueVTs[Value];
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const Type *ArgTy = VT.getTypeForMVT();
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ISD::ArgFlagsTy Flags;
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unsigned OriginalAlignment =
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getTargetData()->getABITypeAlignment(I->getType());
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getTargetData()->getABITypeAlignment(ArgTy);
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if (F.paramHasAttr(j, ParamAttr::ZExt))
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Flags.setZExt();
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@ -4616,6 +4621,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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Ops.push_back(DAG.getArgFlags(MyFlags));
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}
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}
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}
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RetVals.push_back(MVT::Other);
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@ -4646,7 +4652,11 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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unsigned Idx = 1;
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for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E;
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++I, ++Idx) {
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MVT VT = getValueType(I->getType());
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SmallVector<MVT, 4> ValueVTs;
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ComputeValueVTs(*this, I->getType(), ValueVTs);
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for (unsigned Value = 0, NumValues = ValueVTs.size();
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Value != NumValues; ++Value) {
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MVT VT = ValueVTs[Value];
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MVT PartVT = getRegisterType(VT);
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unsigned NumParts = getNumRegisters(VT);
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@ -4663,6 +4673,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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Ops.push_back(getCopyFromParts(DAG, &Parts[0], NumParts, PartVT, VT,
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AssertOp));
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}
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}
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assert(i == NumArgRegs && "Argument register count mismatch!");
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return Ops;
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}
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@ -4687,11 +4698,16 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
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// Handle all of the outgoing arguments.
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for (unsigned i = 0, e = Args.size(); i != e; ++i) {
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MVT VT = getValueType(Args[i].Ty);
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SDOperand Op = Args[i].Node;
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SmallVector<MVT, 4> ValueVTs;
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ComputeValueVTs(*this, Args[i].Ty, ValueVTs);
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for (unsigned Value = 0, NumValues = ValueVTs.size();
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Value != NumValues; ++Value) {
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MVT VT = ValueVTs[Value];
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const Type *ArgTy = VT.getTypeForMVT();
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SDOperand Op = SDOperand(Args[i].Node.Val, Args[i].Node.ResNo + Value);
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ISD::ArgFlagsTy Flags;
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unsigned OriginalAlignment =
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getTargetData()->getABITypeAlignment(Args[i].Ty);
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getTargetData()->getABITypeAlignment(ArgTy);
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if (Args[i].isZExt)
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Flags.setZExt();
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@ -4742,6 +4758,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
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Ops.push_back(DAG.getArgFlags(MyFlags));
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}
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}
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}
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// Figure out the result value types. We start by making a list of
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// the potentially illegal return value types.
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@ -4888,10 +4905,18 @@ LowerArguments(BasicBlock *LLVMBB, SelectionDAGLowering &SDL) {
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unsigned a = 0;
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for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
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AI != E; ++AI, ++a)
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AI != E; ++AI) {
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SmallVector<MVT, 4> ValueVTs;
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ComputeValueVTs(TLI, AI->getType(), ValueVTs);
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unsigned NumValues = ValueVTs.size();
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if (!AI->use_empty()) {
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SDL.setValue(AI, Args[a]);
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SmallVector<MVT, 4> LegalValueVTs(NumValues);
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for (unsigned VI = 0; VI != NumValues; ++VI)
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LegalValueVTs[VI] = Args[a + VI].getValueType();
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SDL.setValue(AI, SDL.DAG.getNode(ISD::MERGE_VALUES,
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SDL.DAG.getVTList(&LegalValueVTs[0],
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NumValues),
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&Args[a], NumValues));
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// If this argument is live outside of the entry block, insert a copy from
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// whereever we got it to the vreg that other BB's will reference it as.
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DenseMap<const Value*, unsigned>::iterator VMI=FuncInfo.ValueMap.find(AI);
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@ -4899,6 +4924,8 @@ LowerArguments(BasicBlock *LLVMBB, SelectionDAGLowering &SDL) {
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SDL.CopyValueToVirtualRegister(AI, VMI->second);
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}
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}
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a += NumValues;
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}
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// Finally, if the target has anything special to do, allow it to do so.
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// FIXME: this should insert code into the DAG!
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