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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145173 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner
2011-11-27 07:37:53 +00:00
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@ -783,12 +783,19 @@ be used to verify some algorithms.
New llvm.fma intrinsic. New llvm.fma intrinsic.
Euro dev meeting and main one too. Euro dev meeting and main one too.
New atomics instructions, "#i_fence" instruction, cmpxchg, atomicrmw too. What target support? Also 'atomic load/store'. See Atomics.html New atomics instructions, "#i_fence" instruction, cmpxchg, atomicrmw too. What target support (X86/ARM)? Also 'atomic load/store'. See Atomics.html
X86: inline assembler supports .code32 and .code64. X86: inline assembler supports .code32 and .code64.
Exception handling rewrite: new landingpad and resume instruction. Unwind gone. Exception handling rewrite: new landingpad and resume instruction. Unwind gone.
LowerSetJmp pass removed, unused. LowerSetJmp pass removed, unused.
llvm-objdump (d0k) and object file parsing stuff (mspencer) llvm-objdump (d0k) and object file parsing stuff (mspencer)
Old arm disassembler replaced with a new one based on autogenerated encoding information from ARM .td files. Old arm disassembler replaced with a new one based on autogenerated encoding information from ARM .td files.
Frontend tests removed from llvm/test/Frontend* (was this completed for 3.0?)
Segmented stack support (X86 only?) Rafael and Sanjoy Das: docs/SegmentedStacks.html should be in CodeGen.html status table?
X86 backend support for NaCl (David Meyer / Nick L)
Codegen now supports vector "select" operations on vector comparisons, turning
them into various optimized code sequences (e.g. using the SSE4/AVX "blend"
instructions).
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