Add AVX version of CLMUL instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109248 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2010-07-23 18:41:12 +00:00
parent a4f4d699ec
commit f528d2b438
5 changed files with 142 additions and 0 deletions

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@ -750,6 +750,23 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
}
}
}
// FIXME: Hack to recognize vpclmul<src1_quadword, src2_quadword>dq
if (PatchedName.startswith("vpclmul")) {
unsigned CLMULQuadWordSelect = StringSwitch<unsigned>(
PatchedName.slice(7, PatchedName.size() - 2))
.Case("lqlq", 0x00) // src1[63:0], src2[63:0]
.Case("hqlq", 0x01) // src1[127:64], src2[63:0]
.Case("lqhq", 0x10) // src1[63:0], src2[127:64]
.Case("hqhq", 0x11) // src1[127:64], src2[127:64]
.Default(~0U);
if (CLMULQuadWordSelect != ~0U) {
ExtraImmOp = MCConstantExpr::Create(CLMULQuadWordSelect,
getParser().getContext());
assert(PatchedName.endswith("dq") && "Unexpected mnemonic!");
PatchedName = "vpclmulqdq";
}
}
Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc));
if (ExtraImmOp)

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@ -439,6 +439,12 @@ class AESAI<bits<8> o, Format F, dag outs, dag ins, string asm,
: Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA,
Requires<[HasAES]>;
// CLMUL Instruction Templates
class CLMULIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
list<dag>pattern>
: Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA,
OpSize, VEX_4V, Requires<[HasAVX, HasCLMUL]>;
// FMA3 Instruction Templates
class FMA3<bits<8> o, Format F, dag outs, dag ins, string asm,
list<dag>pattern>

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@ -5117,6 +5117,41 @@ def AESKEYGENASSIST128rm : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
imm:$src2))]>,
OpSize;
//===----------------------------------------------------------------------===//
// CLMUL Instructions
//===----------------------------------------------------------------------===//
// Only the AVX version of CLMUL instructions are described here.
// Carry-less Multiplication instructions
let isAsmParserOnly = 1 in {
def VPCLMULQDQrr : CLMULIi8<0x44, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2, i8imm:$src3),
"vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
[]>;
def VPCLMULQDQrm : CLMULIi8<0x44, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, i128mem:$src2, i8imm:$src3),
"vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
[]>;
// Assembler Only
multiclass avx_vpclmul<string asm> {
def rr : I<0, Pseudo, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
!strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
[]>;
def rm : I<0, Pseudo, (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2),
!strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
[]>;
}
defm VPCLMULHQHQDQ : avx_vpclmul<"vpclmulhqhqdq">;
defm VPCLMULHQLQDQ : avx_vpclmul<"vpclmulhqlqdq">;
defm VPCLMULLQHQDQ : avx_vpclmul<"vpclmullqhqdq">;
defm VPCLMULLQLQDQ : avx_vpclmul<"vpclmullqlqdq">;
} // isAsmParserOnly
//===----------------------------------------------------------------------===//
// AVX Instructions
//===----------------------------------------------------------------------===//

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@ -0,0 +1,42 @@
// RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s
// CHECK: vpclmulqdq $17, %xmm2, %xmm5, %xmm1
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x11]
vpclmulhqhqdq %xmm2, %xmm5, %xmm1
// CHECK: vpclmulqdq $17, (%eax), %xmm5, %xmm3
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x11]
vpclmulhqhqdq (%eax), %xmm5, %xmm3
// CHECK: vpclmulqdq $1, %xmm2, %xmm5, %xmm1
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x01]
vpclmulhqlqdq %xmm2, %xmm5, %xmm1
// CHECK: vpclmulqdq $1, (%eax), %xmm5, %xmm3
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x01]
vpclmulhqlqdq (%eax), %xmm5, %xmm3
// CHECK: vpclmulqdq $16, %xmm2, %xmm5, %xmm1
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x10]
vpclmullqhqdq %xmm2, %xmm5, %xmm1
// CHECK: vpclmulqdq $16, (%eax), %xmm5, %xmm3
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x10]
vpclmullqhqdq (%eax), %xmm5, %xmm3
// CHECK: vpclmulqdq $0, %xmm2, %xmm5, %xmm1
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x00]
vpclmullqlqdq %xmm2, %xmm5, %xmm1
// CHECK: vpclmulqdq $0, (%eax), %xmm5, %xmm3
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x00]
vpclmullqlqdq (%eax), %xmm5, %xmm3
// CHECK: vpclmulqdq $17, %xmm2, %xmm5, %xmm1
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0xca,0x11]
vpclmulqdq $17, %xmm2, %xmm5, %xmm1
// CHECK: vpclmulqdq $17, (%eax), %xmm5, %xmm3
// CHECK: encoding: [0xc4,0xe3,0x51,0x44,0x18,0x11]
vpclmulqdq $17, (%eax), %xmm5, %xmm3

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@ -0,0 +1,42 @@
// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
// CHECK: vpclmulqdq $17, %xmm12, %xmm10, %xmm11
// CHECK: encoding: [0xc4,0x43,0x29,0x44,0xdc,0x11]
vpclmulhqhqdq %xmm12, %xmm10, %xmm11
// CHECK: vpclmulqdq $17, (%rax), %xmm10, %xmm13
// CHECK: encoding: [0xc4,0x63,0x29,0x44,0x28,0x11]
vpclmulhqhqdq (%rax), %xmm10, %xmm13
// CHECK: vpclmulqdq $1, %xmm12, %xmm10, %xmm11
// CHECK: encoding: [0xc4,0x43,0x29,0x44,0xdc,0x01]
vpclmulhqlqdq %xmm12, %xmm10, %xmm11
// CHECK: vpclmulqdq $1, (%rax), %xmm10, %xmm13
// CHECK: encoding: [0xc4,0x63,0x29,0x44,0x28,0x01]
vpclmulhqlqdq (%rax), %xmm10, %xmm13
// CHECK: vpclmulqdq $16, %xmm12, %xmm10, %xmm11
// CHECK: encoding: [0xc4,0x43,0x29,0x44,0xdc,0x10]
vpclmullqhqdq %xmm12, %xmm10, %xmm11
// CHECK: vpclmulqdq $16, (%rax), %xmm10, %xmm13
// CHECK: encoding: [0xc4,0x63,0x29,0x44,0x28,0x10]
vpclmullqhqdq (%rax), %xmm10, %xmm13
// CHECK: vpclmulqdq $0, %xmm12, %xmm10, %xmm11
// CHECK: encoding: [0xc4,0x43,0x29,0x44,0xdc,0x00]
vpclmullqlqdq %xmm12, %xmm10, %xmm11
// CHECK: vpclmulqdq $0, (%rax), %xmm10, %xmm13
// CHECK: encoding: [0xc4,0x63,0x29,0x44,0x28,0x00]
vpclmullqlqdq (%rax), %xmm10, %xmm13
// CHECK: vpclmulqdq $17, %xmm12, %xmm10, %xmm11
// CHECK: encoding: [0xc4,0x43,0x29,0x44,0xdc,0x11]
vpclmulqdq $17, %xmm12, %xmm10, %xmm11
// CHECK: vpclmulqdq $17, (%rax), %xmm10, %xmm13
// CHECK: encoding: [0xc4,0x63,0x29,0x44,0x28,0x11]
vpclmulqdq $17, (%rax), %xmm10, %xmm13