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Fix fp constant loads to have a destination register.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114930 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2010-09-28 00:35:09 +00:00
parent ee70fa77b4
commit f5732c4ee5
1 changed files with 3 additions and 2 deletions
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5
lib/Target/ARM/ARMFastISel.cpp
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@@ -397,8 +397,9 @@ unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) {
unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS;
// The extra reg is for addrmode5. // The extra reg is for addrmode5.
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc)) AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
.addReg(DestReg).addConstantPoolIndex(Idx) DestReg)
.addConstantPoolIndex(Idx)
.addReg(0)); .addReg(0));
return DestReg; return DestReg;
} }