diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index a9003e83691..bf939ab0fb6 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -504,6 +504,10 @@ bool X86FastISel::X86SelectShift(Instruction *I) { return false; } + MVT VT = MVT::getMVT(I->getType(), /*HandleUnknown=*/true); + if (VT == MVT::Other || !TLI.isTypeLegal(VT)) + return false; + unsigned Op0Reg = getRegForValue(I->getOperand(0)); if (Op0Reg == 0) return false; unsigned Op1Reg = getRegForValue(I->getOperand(1)); @@ -516,7 +520,7 @@ bool X86FastISel::X86SelectShift(Instruction *I) { } bool X86FastISel::X86SelectSelect(Instruction *I) { - const Type *Ty = I->getOperand(1)->getType(); + const Type *Ty = I->getType(); if (isa(Ty)) Ty = TLI.getTargetData()->getIntPtrType(); @@ -535,6 +539,10 @@ bool X86FastISel::X86SelectSelect(Instruction *I) { return false; } + MVT VT = MVT::getMVT(Ty, /*HandleUnknown=*/true); + if (VT == MVT::Other || !TLI.isTypeLegal(VT)) + return false; + unsigned Op0Reg = getRegForValue(I->getOperand(0)); if (Op0Reg == 0) return false; unsigned Op1Reg = getRegForValue(I->getOperand(1));