6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-15 05:24:01 +00:00
Code Issues Projects Releases Wiki Activity

Revert 107840 107839 107813 107804 107800 107797 107791.

Browse Source 
Debug info intrinsics win for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2010-07-08 01:00:56 +00:00
parent d9642faf7c
commit f595141525
22 changed files with 367 additions and 540 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
lib/CodeGen/CallingConvLower.cpp
View File

@ -80,12 +80,13 @@ CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
/// CheckReturn - Analyze the return values of a function, returning true if
/// the return can be performed without sret-demotion, and false otherwise.
bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
bool CCState::CheckReturn(const SmallVectorImpl<EVT> &OutTys,
const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
CCAssignFn Fn) {
// Determine which register each value should be copied into.
for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
EVT VT = Outs[i].VT;
ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
for (unsigned i = 0, e = OutTys.size(); i != e; ++i) {
EVT VT = OutTys[i];
ISD::ArgFlagsTy ArgFlags = ArgsFlags[i];
if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
return false;
}