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use MVN to handle small negative constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32459 91177308-0d34-0410-b5e6-96231b3b80d8
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12375467b2
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@ -781,6 +781,8 @@ public:
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virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
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virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
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bool SelectAddrMode1(SDOperand Op, SDOperand N, SDOperand &Arg,
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bool SelectAddrMode1(SDOperand Op, SDOperand N, SDOperand &Arg,
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SDOperand &Shift, SDOperand &ShiftType);
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SDOperand &Shift, SDOperand &ShiftType);
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bool SelectAddrMode1a(SDOperand Op, SDOperand N, SDOperand &Arg,
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SDOperand &Shift, SDOperand &ShiftType);
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bool SelectAddrMode2(SDOperand Op, SDOperand N, SDOperand &Arg,
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bool SelectAddrMode2(SDOperand Op, SDOperand N, SDOperand &Arg,
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SDOperand &Offset);
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SDOperand &Offset);
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bool SelectAddrMode5(SDOperand Op, SDOperand N, SDOperand &Arg,
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bool SelectAddrMode5(SDOperand Op, SDOperand N, SDOperand &Arg,
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@ -883,6 +885,25 @@ bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand Op,
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return true;
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return true;
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}
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}
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bool ARMDAGToDAGISel::SelectAddrMode1a(SDOperand Op,
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SDOperand N,
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SDOperand &Arg,
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SDOperand &Shift,
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SDOperand &ShiftType) {
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if (N.getOpcode() != ISD::Constant)
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return false;
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uint32_t val = ~cast<ConstantSDNode>(N)->getValue();
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if(!isRotInt8Immediate(val))
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return false;
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Arg = CurDAG->getTargetConstant(val, MVT::i32);
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Shift = CurDAG->getTargetConstant(0, MVT::i32);
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ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32);
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return true;
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}
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bool ARMDAGToDAGISel::SelectAddrMode2(SDOperand Op, SDOperand N,
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bool ARMDAGToDAGISel::SelectAddrMode2(SDOperand Op, SDOperand N,
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SDOperand &Arg, SDOperand &Offset) {
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SDOperand &Arg, SDOperand &Offset) {
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//TODO: complete and cleanup!
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//TODO: complete and cleanup!
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@ -18,6 +18,11 @@ def op_addr_mode1 : Operand<iPTR> {
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let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm);
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let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm);
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}
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}
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def op_addr_mode1a : Operand<iPTR> {
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let PrintMethod = "printAddrMode1";
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let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm);
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}
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def op_addr_mode2 : Operand<iPTR> {
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def op_addr_mode2 : Operand<iPTR> {
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let PrintMethod = "printAddrMode2";
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let PrintMethod = "printAddrMode2";
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let MIOperandInfo = (ops ptr_rc, i32imm);
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let MIOperandInfo = (ops ptr_rc, i32imm);
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@ -33,6 +38,9 @@ def op_addr_mode5 : Operand<iPTR> {
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def addr_mode1 : ComplexPattern<iPTR, 3, "SelectAddrMode1", [imm, sra, shl, srl],
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def addr_mode1 : ComplexPattern<iPTR, 3, "SelectAddrMode1", [imm, sra, shl, srl],
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[]>;
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[]>;
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//Addressing Mode 1a: MVN hack
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def addr_mode1a : ComplexPattern<iPTR, 3, "SelectAddrMode1a", [imm], []>;
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//Addressing Mode 2: Load and Store Word or Unsigned Byte
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//Addressing Mode 2: Load and Store Word or Unsigned Byte
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def addr_mode2 : ComplexPattern<iPTR, 2, "SelectAddrMode2", [], []>;
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def addr_mode2 : ComplexPattern<iPTR, 2, "SelectAddrMode2", [], []>;
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@ -193,6 +201,9 @@ def MOV : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src),
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def MVN : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src),
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def MVN : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src),
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"mvn $dst, $src", [(set IntRegs:$dst, (not addr_mode1:$src))]>;
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"mvn $dst, $src", [(set IntRegs:$dst, (not addr_mode1:$src))]>;
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def MVN2 : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src),
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"mvn $dst, $src", [(set IntRegs:$dst, addr_mode1a:$src)]>;
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def ADD : Addr1BinOp<"add", add>;
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def ADD : Addr1BinOp<"add", add>;
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def ADCS : Addr1BinOp<"adcs", adde>;
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def ADCS : Addr1BinOp<"adcs", adde>;
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def ADDS : Addr1BinOp<"adds", addc>;
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def ADDS : Addr1BinOp<"adds", addc>;
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@ -1,9 +1,9 @@
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r1, #0" | wc -l | grep 4 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r1, #0" | wc -l | grep 4 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #1" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #1" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep ".word.*2147483647" | wc -l | grep 2 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mvn r0, #-2147483648" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #-2147483648" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mov r0, #-2147483648" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep ".word.*4294967295" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "mvn r1, #-2147483648" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "adds" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "adds" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "adcs" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "adcs" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "subs" | wc -l | grep 1 &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "subs" | wc -l | grep 1 &&
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@ -1,10 +1,10 @@
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 4
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; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 5
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;int %f1() {
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int %f1() {
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;entry:
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entry:
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; ret int -1
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ret int -1
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;}
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}
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int %f2(int %a) {
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int %f2(int %a) {
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entry:
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entry:
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