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ARM push of a single register encodes as pre-indexed STR.

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Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-08-11 18:07:11 +00:00
parent 5c1ff1f2f2
commit f6713916fb
4 changed files with 25 additions and 3 deletions
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2
test/CodeGen/ARM/str_pre-2.ll
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@@ -7,7 +7,7 @@
define i64 @t(i64 %a) nounwind readonly {
entry:
; CHECK: str lr, [sp, #-4]!
; CHECK: push {lr}
; CHECK: pop {lr}
%0 = load i64** @b, align 4
%1 = load i64* %0, align 4