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Remove redundant Thumb2 ADD/SUB SP instruction definitions.

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Unlike Thumb1, Thumb2 does not have dedicated encodings for adjusting the
stack pointer. It can just use the normal add-register-immediate encoding
since it can use all registers as a source, not just R0-R7. The extra
instruction definitions are just duplicates of the normal instructions with
the (not well enforced) constraint that the source register was SP.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134114 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-06-29 23:25:04 +00:00
parent 6531bddb86
commit f6fd90910a
7 changed files with 56 additions and 118 deletions
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utils/TableGen/ARMDecoderEmitter.cpp
+1 -5
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@@ -1640,12 +1640,8 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
// Ignore tADDrSP, tADDspr, and tPICADD, prefer the generic tADDhirr.
// Ignore t2SUBrSPs, prefer the t2SUB[S]r[r|s].
// Ignore t2ADDrSPs, prefer the t2ADD[S]r[r|s].
// Ignore t2ADDrSPi/t2SUBrSPi, which have more generic couterparts.
// Ignore t2ADDrSPi12/t2SUBrSPi12, which have more generic couterparts
if (Name == "tADDrSP" || Name == "tADDspr" || Name == "tPICADD" ||
Name == "t2SUBrSPs" || Name == "t2ADDrSPs" ||
Name == "t2ADDrSPi" || Name == "t2SUBrSPi" ||
Name == "t2ADDrSPi12" || Name == "t2SUBrSPi12")
Name == "t2SUBrSPs" || Name == "t2ADDrSPs")
return false;
// FIXME: Use ldr.n to work around a Darwin assembler bug.