6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-15 07:34:33 +00:00
Code Issues Projects Releases Wiki Activity

The first patch of X86 support for read cycle counter

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24429 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-11-20 21:32:07 +00:00
parent 6bf234c4a8
commit f70e30b41d
1 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -1168,6 +1168,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
if (Tmp1 != Node->getOperand(0)) if (Tmp1 != Node->getOperand(0))
Result = DAG.getNode(ISD::READCYCLECOUNTER, MVT::i64, Tmp1); Result = DAG.getNode(ISD::READCYCLECOUNTER, MVT::i64, Tmp1);
break; break;
case ISD::TRUNCSTORE: case ISD::TRUNCSTORE:
Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer. Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the pointer.
@ -3336,6 +3337,17 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
Hi = DAG.getConstant(0, NVT); Hi = DAG.getConstant(0, NVT);
break; break;
} }
case ISD::READCYCLECOUNTER:
if (TLI.getOperationAction(ISD::READCYCLECOUNTER, VT) == TargetLowering::Custom) {
SDOperand Chain = LegalizeOp(Node->getOperand(0));
AddLegalizedOperand(SDOperand(Node, 1), Chain);
SDOperand t = TLI.LowerOperation(Op, DAG);
ExpandOp(t, Lo, Hi);
} else
assert(0 && "Must custom expand ReadCycleCounter");
break;
// These operators cannot be expanded directly, emit them as calls to // These operators cannot be expanded directly, emit them as calls to
// library functions. // library functions.
case ISD::FP_TO_SINT: case ISD::FP_TO_SINT: