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Instead of adding dependence edges between terminator instructions

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and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.

Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62366 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-01-16 22:10:20 +00:00
parent 49bb50e0b6
commit f7119393a9
7 changed files with 70 additions and 26 deletions
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include/llvm/CodeGen/ScheduleDAG.h
+5 -1
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@@ -418,6 +418,8 @@ namespace llvm {
public:
SelectionDAG *DAG; // DAG of the current basic block
MachineBasicBlock *BB; // Current basic block
MachineBasicBlock::iterator Begin; // The beginning of the range to be scheduled.
MachineBasicBlock::iterator End; // The end of the range to be scheduled.
const TargetMachine &TM; // Target processor
const TargetInstrInfo *TII; // Target instruction information
const TargetRegisterInfo *TRI; // Target processor register info
@@ -440,7 +442,9 @@ namespace llvm {
/// Run - perform scheduling.
///
void Run(SelectionDAG *DAG, MachineBasicBlock *MBB);
void Run(SelectionDAG *DAG, MachineBasicBlock *MBB,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End);
/// BuildSchedGraph - Build SUnits and set up their Preds and Succs
/// to form the scheduling dependency graph.