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InstCombine: Combine (X+cst) < 0 --> X < -cst
This can happen pretty often in code that looks like: int foo = bar - 1; if (foo < 0) do stuff In this case, bar < 1 is an equivalent condition. This transform requires that the add instruction be annotated with nsw. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221045 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3015,6 +3015,12 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
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if (BO1 && BO1->getOpcode() == Instruction::Add)
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C = BO1->getOperand(0), D = BO1->getOperand(1);
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// icmp (X+cst) < 0 --> X < -cst
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if (NoOp0WrapProblem && ICmpInst::isSigned(Pred) && match(Op1, m_Zero()))
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if (ConstantInt *RHSC = dyn_cast_or_null<ConstantInt>(B))
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if (!RHSC->isMinValue(/*isSigned=*/true))
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return new ICmpInst(Pred, A, ConstantExpr::getNeg(RHSC));
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// icmp (X+Y), X -> icmp Y, 0 for equalities or if there is no overflow.
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if ((A == Op1 || B == Op1) && NoOp0WrapProblem)
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return new ICmpInst(Pred, A == Op1 ? B : A,
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@ -1479,3 +1479,35 @@ define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_3(i32 %a) {
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%cmp = icmp eq i32 %shl, 50
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ret i1 %cmp
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}
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; CHECK-LABEL: @icmp_sgt_zero_add_nsw
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; CHECK-NEXT: icmp sgt i32 %a, -1
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define i1 @icmp_sgt_zero_add_nsw(i32 %a) {
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%add = add nsw i32 %a, 1
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%cmp = icmp sgt i32 %add, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @icmp_sge_zero_add_nsw
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; CHECK-NEXT: icmp sgt i32 %a, -2
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define i1 @icmp_sge_zero_add_nsw(i32 %a) {
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%add = add nsw i32 %a, 1
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%cmp = icmp sge i32 %add, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @icmp_slt_zero_add_nsw
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; CHECK-NEXT: icmp slt i32 %a, -1
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define i1 @icmp_slt_zero_add_nsw(i32 %a) {
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%add = add nsw i32 %a, 1
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%cmp = icmp slt i32 %add, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @icmp_sle_zero_add_nsw
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; CHECK-NEXT: icmp slt i32 %a, 0
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define i1 @icmp_sle_zero_add_nsw(i32 %a) {
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%add = add nsw i32 %a, 1
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%cmp = icmp sle i32 %add, 0
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ret i1 %cmp
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}
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