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[mips][mips64r6] Add relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2
Differential Revision: http://reviews.llvm.org/D3824 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209655 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -102,6 +102,22 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
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if (!isIntN(16, Value) && Ctx)
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Ctx->FatalError(Fixup.getLoc(), "out of range PC16 fixup");
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break;
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case Mips::fixup_MIPS_PC21_S2:
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Value -= 4;
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// Forcing a signed division because Value can be negative.
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Value = (int64_t) Value / 4;
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// We now check if Value can be encoded as a 21-bit signed immediate.
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if (!isIntN(21, Value) && Ctx)
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Ctx->FatalError(Fixup.getLoc(), "out of range PC21 fixup");
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break;
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case Mips::fixup_MIPS_PC26_S2:
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Value -= 4;
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// Forcing a signed division because Value can be negative.
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Value = (int64_t) Value / 4;
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// We now check if Value can be encoded as a 26-bit signed immediate.
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if (!isIntN(26, Value) && Ctx)
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Ctx->FatalError(Fixup.getLoc(), "out of range PC26 fixup");
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break;
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}
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return Value;
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@ -229,6 +245,8 @@ getFixupKindInfo(MCFixupKind Kind) const {
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{ "fixup_Mips_GOT_LO16", 0, 16, 0 },
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{ "fixup_Mips_CALL_HI16", 0, 16, 0 },
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{ "fixup_Mips_CALL_LO16", 0, 16, 0 },
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{ "fixup_MIPS_PC21_S2", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_MIPS_PC26_S2", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_MICROMIPS_26_S1", 0, 26, 0 },
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{ "fixup_MICROMIPS_HI16", 0, 16, 0 },
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{ "fixup_MICROMIPS_LO16", 0, 16, 0 },
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@ -286,6 +304,8 @@ getFixupKindInfo(MCFixupKind Kind) const {
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{ "fixup_Mips_GOT_LO16", 16, 16, 0 },
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{ "fixup_Mips_CALL_HI16", 16, 16, 0 },
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{ "fixup_Mips_CALL_LO16", 16, 16, 0 },
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{ "fixup_MIPS_PC21_S2", 11, 21, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_MIPS_PC26_S2", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_MICROMIPS_26_S1", 6, 26, 0 },
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{ "fixup_MICROMIPS_HI16", 16, 16, 0 },
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{ "fixup_MICROMIPS_LO16", 16, 16, 0 },
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@ -193,6 +193,12 @@ unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
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case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
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Type = ELF::R_MICROMIPS_TLS_TPREL_LO16;
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break;
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case Mips::fixup_MIPS_PC21_S2:
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Type = ELF::R_MIPS_PC21_S2;
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break;
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case Mips::fixup_MIPS_PC26_S2:
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Type = ELF::R_MIPS_PC26_S2;
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break;
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}
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return Type;
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}
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@ -128,6 +128,12 @@ namespace Mips {
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// resulting in - R_MIPS_CALL_LO16
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fixup_Mips_CALL_LO16,
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// resulting in - R_MIPS_PC21_S2
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fixup_MIPS_PC21_S2,
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// resulting in - R_MIPS_PC26_S2
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fixup_MIPS_PC26_S2,
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// resulting in - R_MICROMIPS_26_S1
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fixup_MICROMIPS_26_S1,
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@ -258,7 +258,9 @@ getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
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assert(MO.isExpr() &&
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"getBranchTarget21OpValue expects only expressions or immediates");
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// TODO: Push 21 PC fixup.
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const MCExpr *Expr = MO.getExpr();
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Fixups.push_back(MCFixup::Create(0, Expr,
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MCFixupKind(Mips::fixup_MIPS_PC21_S2)));
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return 0;
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}
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@ -278,7 +280,9 @@ getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
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assert(MO.isExpr() &&
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"getBranchTarget26OpValue expects only expressions or immediates");
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// TODO: Push 26 PC fixup.
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const MCExpr *Expr = MO.getExpr();
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Fixups.push_back(MCFixup::Create(0, Expr,
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MCFixupKind(Mips::fixup_MIPS_PC26_S2)));
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return 0;
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}
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43
test/MC/Mips/mips32r6/relocations.s
Normal file
43
test/MC/Mips/mips32r6/relocations.s
Normal file
@ -0,0 +1,43 @@
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# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
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# RUN: | FileCheck %s -check-prefix=CHECK-FIXUP
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# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips32r6 \
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# RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
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#------------------------------------------------------------------------------
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# Check that the assembler can handle the documented syntax for fixups.
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#------------------------------------------------------------------------------
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# CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_Mips_PC16
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# CHECK-FIXUP: bnec $5, $6, bar # encoding: [0x60,0xa6,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_Mips_PC16
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# CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC21_S2
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# CHECK-FIXUP: bnezc $9, bar # encoding: [0xf9,0b001AAAAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC21_S2
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# CHECK-FIXUP: balc bar # encoding: [0b111010AA,A,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC26_S2
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# CHECK-FIXUP: bc bar # encoding: [0b110010AA,A,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC26_S2
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#------------------------------------------------------------------------------
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# Check that the appropriate relocations were created.
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#------------------------------------------------------------------------------
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# CHECK-ELF: Relocations [
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# CHECK-ELF: 0x0 R_MIPS_PC16 bar 0x0
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# CHECK-ELF: 0x4 R_MIPS_PC16 bar 0x0
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# CHECK-ELF: 0x8 R_MIPS_PC21_S2 bar 0x0
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# CHECK-ELF: 0xC R_MIPS_PC21_S2 bar 0x0
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# CHECK-ELF: 0x10 R_MIPS_PC26_S2 bar 0x0
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# CHECK-ELF: 0x14 R_MIPS_PC26_S2 bar 0x0
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# CHECK-ELF: ]
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beqc $5, $6, bar
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bnec $5, $6, bar
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beqzc $9, bar
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bnezc $9, bar
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balc bar
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bc bar
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43
test/MC/Mips/mips64r6/relocations.s
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43
test/MC/Mips/mips64r6/relocations.s
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@ -0,0 +1,43 @@
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# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 \
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# RUN: | FileCheck %s -check-prefix=CHECK-FIXUP
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# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips64r6 \
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# RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
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#------------------------------------------------------------------------------
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# Check that the assembler can handle the documented syntax for fixups.
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#------------------------------------------------------------------------------
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# CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_Mips_PC16
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# CHECK-FIXUP: bnec $5, $6, bar # encoding: [0x60,0xa6,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_Mips_PC16
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# CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC21_S2
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# CHECK-FIXUP: bnezc $9, bar # encoding: [0xf9,0b001AAAAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC21_S2
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# CHECK-FIXUP: balc bar # encoding: [0b111010AA,A,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC26_S2
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# CHECK-FIXUP: bc bar # encoding: [0b110010AA,A,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC26_S2
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#------------------------------------------------------------------------------
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# Check that the appropriate relocations were created.
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#------------------------------------------------------------------------------
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# CHECK-ELF: Relocations [
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# CHECK-ELF: 0x0 R_MIPS_PC16 bar 0x0
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# CHECK-ELF: 0x4 R_MIPS_PC16 bar 0x0
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# CHECK-ELF: 0x8 R_MIPS_PC21_S2 bar 0x0
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# CHECK-ELF: 0xC R_MIPS_PC21_S2 bar 0x0
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# CHECK-ELF: 0x10 R_MIPS_PC26_S2 bar 0x0
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# CHECK-ELF: 0x14 R_MIPS_PC26_S2 bar 0x0
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# CHECK-ELF: ]
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beqc $5, $6, bar
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bnec $5, $6, bar
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beqzc $9, bar
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bnezc $9, bar
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balc bar
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bc bar
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