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Don't glue users to extract_subreg when selecting the llvm.arm.ldrexd

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intrinsic - it can cause impossible-to-schedule subgraphs to be
introduced.

PR15053.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176777 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames 2013-03-09 22:56:09 +00:00
parent d683edc711
commit f793de7a23
2 changed files with 17 additions and 6 deletions
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10
lib/Target/ARM/ARMISelDAGToDAG.cpp
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@ -3155,7 +3155,7 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) {
cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1);
// Remap uses.
SDValue Glue = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1);
SDValue OutChain = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1);
if (!SDValue(N, 0).use_empty()) {
SDValue Result;
if (isThumb)
@ -3163,9 +3163,8 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) {
else {
SDValue SubRegIdx = CurDAG->getTargetConstant(ARM::gsub_0, MVT::i32);
SDNode *ResNode = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
dl, MVT::i32, MVT::Glue, SDValue(Ld, 0), SubRegIdx, Glue);
dl, MVT::i32, SDValue(Ld, 0), SubRegIdx);
Result = SDValue(ResNode,0);
Glue = Result.getValue(1);
}
ReplaceUses(SDValue(N, 0), Result);
}
@ -3176,13 +3175,12 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) {
else {
SDValue SubRegIdx = CurDAG->getTargetConstant(ARM::gsub_1, MVT::i32);
SDNode *ResNode = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
dl, MVT::i32, MVT::Glue, SDValue(Ld, 0), SubRegIdx, Glue);
dl, MVT::i32, SDValue(Ld, 0), SubRegIdx);
Result = SDValue(ResNode,0);
Glue = Result.getValue(1);
}
ReplaceUses(SDValue(N, 1), Result);
}
ReplaceUses(SDValue(N, 2), Glue);
ReplaceUses(SDValue(N, 2), OutChain);
return NULL;
}

13
test/CodeGen/ARM/2013-03-09-PR15053.ll Normal file
View File

@ -0,0 +1,13 @@
; RUN: llc -mtriple=armv7 < %s
; PR15053
declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
declare { i32, i32 } @llvm.arm.ldrexd(i8*) nounwind readonly
define void @foo() {
entry:
%0 = tail call { i32, i32 } @llvm.arm.ldrexd(i8* undef) nounwind
%1 = extractvalue { i32, i32 } %0, 0
%2 = tail call i32 @llvm.arm.strexd(i32 %1, i32 undef, i8* undef) nounwind
ret void
}