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Be more clever about regclasses in ScheduleDAGSDNodes::EmitCopyFromReg.

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If two uses of a CopyFromReg want different regclasses, first try a common
sub-class, then fall back on the copy emitted in AddRegisterOperand. There is
no need for an assert here. The cross-class joiner usually cleans up nicely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79193 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2009-08-16 17:40:59 +00:00
parent 9ae7d44d95
commit f7e8af925c
1 changed files with 5 additions and 5 deletions
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10
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
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@ -81,11 +81,11 @@ EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, bool IsCloned,
if (!UseRC)
UseRC = RC;
else if (RC) {
if (UseRC->hasSuperClass(RC))
UseRC = RC;
else
assert((UseRC == RC || RC->hasSuperClass(UseRC)) &&
"Multiple uses expecting different register classes!");
const TargetRegisterClass *ComRC = getCommonSubClass(UseRC, RC);
// If multiple uses expect disjoint register classes, we emit
// copies in AddRegisterOperand.
if (ComRC)
UseRC = ComRC;
}
}
}