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C++ has a bool type! (And C's had one too, for 15 years...)

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206723 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Smith 2014-04-20 22:15:37 +00:00
parent 4c09131c4f
commit f8107eb051
2 changed files with 33 additions and 38 deletions
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61
lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
View File

@ -47,9 +47,6 @@ struct ContextDecision {
#include "X86GenDisassemblerTables.inc"
#define TRUE 1
#define FALSE 0
#ifndef NDEBUG
#define debug(s) do { Debug(__FILE__, __LINE__, s); } while (0)
#else
@ -78,7 +75,7 @@ static InstructionContext contextForAttrs(uint16_t attrMask) {
* contextForAttrs.
* @param opcode - The last byte of the instruction's opcode, not counting
* ModR/M extensions and escapes.
* @return - TRUE if the ModR/M byte is required, FALSE otherwise.
* @return - true if the ModR/M byte is required, false otherwise.
*/
static int modRMRequired(OpcodeType type,
InstructionContext insnContext,
@ -309,15 +306,15 @@ static void setPrefixPresent(struct InternalInstruction* insn,
* @param location - The location to query.
* @return - Whether the prefix is at that location.
*/
static BOOL isPrefixAtLocation(struct InternalInstruction* insn,
static bool isPrefixAtLocation(struct InternalInstruction* insn,
uint8_t prefix,
uint64_t location)
{
if (insn->prefixPresent[prefix] == 1 &&
insn->prefixLocations[prefix] == location)
return TRUE;
return true;
else
return FALSE;
return false;
}
/*
@ -330,14 +327,14 @@ static BOOL isPrefixAtLocation(struct InternalInstruction* insn,
* bytes, and no prefixes conflicted; nonzero otherwise.
*/
static int readPrefixes(struct InternalInstruction* insn) {
BOOL isPrefix = TRUE;
BOOL prefixGroups[4] = { FALSE };
bool isPrefix = true;
bool prefixGroups[4] = { false };
uint64_t prefixLocation;
uint8_t byte = 0;
uint8_t nextByte;
BOOL hasAdSize = FALSE;
BOOL hasOpSize = FALSE;
bool hasAdSize = false;
bool hasOpSize = false;
dbgprintf(insn, "readPrefixes()");
@ -369,7 +366,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
if ((byte == 0xf2 || byte == 0xf3) &&
((nextByte == 0xf0) |
((nextByte & 0xfe) == 0x86 || (nextByte & 0xf8) == 0x90)))
insn->xAcquireRelease = TRUE;
insn->xAcquireRelease = true;
/*
* Also if the byte is 0xf3, and the following condition is met:
* - it is followed by a "mov mem, reg" (opcode 0x88/0x89) or
@ -379,7 +376,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
if (byte == 0xf3 &&
(nextByte == 0x88 || nextByte == 0x89 ||
nextByte == 0xc6 || nextByte == 0xc7))
insn->xAcquireRelease = TRUE;
insn->xAcquireRelease = true;
if (insn->mode == MODE_64BIT && (nextByte & 0xf0) == 0x40) {
if (consumeByte(insn, &nextByte))
return -1;
@ -397,7 +394,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
case 0xf3: /* REP or REPE/REPZ */
if (prefixGroups[0])
dbgprintf(insn, "Redundant Group 1 prefix");
prefixGroups[0] = TRUE;
prefixGroups[0] = true;
setPrefixPresent(insn, byte, prefixLocation);
break;
case 0x2e: /* CS segment override -OR- Branch not taken */
@ -431,25 +428,25 @@ static int readPrefixes(struct InternalInstruction* insn) {
}
if (prefixGroups[1])
dbgprintf(insn, "Redundant Group 2 prefix");
prefixGroups[1] = TRUE;
prefixGroups[1] = true;
setPrefixPresent(insn, byte, prefixLocation);
break;
case 0x66: /* Operand-size override */
if (prefixGroups[2])
dbgprintf(insn, "Redundant Group 3 prefix");
prefixGroups[2] = TRUE;
hasOpSize = TRUE;
prefixGroups[2] = true;
hasOpSize = true;
setPrefixPresent(insn, byte, prefixLocation);
break;
case 0x67: /* Address-size override */
if (prefixGroups[3])
dbgprintf(insn, "Redundant Group 4 prefix");
prefixGroups[3] = TRUE;
hasAdSize = TRUE;
prefixGroups[3] = true;
hasAdSize = true;
setPrefixPresent(insn, byte, prefixLocation);
break;
default: /* Not a prefix byte */
isPrefix = FALSE;
isPrefix = false;
break;
}
@ -574,7 +571,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
default:
break;
case VEX_PREFIX_66:
hasOpSize = TRUE;
hasOpSize = true;
break;
}
@ -620,7 +617,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
default:
break;
case VEX_PREFIX_66:
hasOpSize = TRUE;
hasOpSize = true;
break;
}
@ -815,7 +812,7 @@ static int readModRM(struct InternalInstruction* insn);
static int getIDWithAttrMask(uint16_t* instructionID,
struct InternalInstruction* insn,
uint16_t attrMask) {
BOOL hasModRMExtension;
bool hasModRMExtension;
InstructionContext instructionClass = contextForAttrs(attrMask);
@ -848,14 +845,14 @@ static int getIDWithAttrMask(uint16_t* instructionID,
* @param orig - The instruction that is not 16-bit
* @param equiv - The instruction that is 16-bit
*/
static BOOL is16BitEquivalent(const char* orig, const char* equiv) {
static bool is16BitEquivalent(const char* orig, const char* equiv) {
off_t i;
for (i = 0;; i++) {
if (orig[i] == '\0' && equiv[i] == '\0')
return TRUE;
return true;
if (orig[i] == '\0' || equiv[i] == '\0')
return FALSE;
return false;
if (orig[i] != equiv[i]) {
if ((orig[i] == 'Q' || orig[i] == 'L') && equiv[i] == 'W')
continue;
@ -863,7 +860,7 @@ static BOOL is16BitEquivalent(const char* orig, const char* equiv) {
continue;
if ((orig[i] == '4' || orig[i] == '2') && equiv[i] == '6')
continue;
return FALSE;
return false;
}
}
}
@ -1108,7 +1105,7 @@ static int readSIB(struct InternalInstruction* insn) {
if (insn->consumedSIB)
return 0;
insn->consumedSIB = TRUE;
insn->consumedSIB = true;
switch (insn->addressSize) {
case 2:
@ -1206,12 +1203,12 @@ static int readDisplacement(struct InternalInstruction* insn) {
if (insn->consumedDisplacement)
return 0;
insn->consumedDisplacement = TRUE;
insn->consumedDisplacement = true;
insn->displacementOffset = insn->readerCursor - insn->startLocation;
switch (insn->eaDisplacement) {
case EA_DISP_NONE:
insn->consumedDisplacement = FALSE;
insn->consumedDisplacement = false;
break;
case EA_DISP_8:
if (consumeInt8(insn, &d8))
@ -1230,7 +1227,7 @@ static int readDisplacement(struct InternalInstruction* insn) {
break;
}
insn->consumedDisplacement = TRUE;
insn->consumedDisplacement = true;
return 0;
}
@ -1251,7 +1248,7 @@ static int readModRM(struct InternalInstruction* insn) {
if (consumeByte(insn, &insn->modRM))
return -1;
insn->consumedModRM = TRUE;
insn->consumedModRM = true;
mod = modFromModRM(insn->modRM);
rm = rmFromModRM(insn->modRM);

10
lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
View File

@ -473,8 +473,6 @@ enum VectorExtensionType {
TYPE_XOP = 0x4
};
typedef uint8_t BOOL;
/// \brief Type for the byte reader that the consumer must provide to
/// the decoder. Reads a single byte from the instruction's address space.
/// \param arg A baton that the consumer can associate with any internal
@ -541,7 +539,7 @@ struct InternalInstruction {
// The segment override type
SegmentOverride segmentOverride;
// 1 if the prefix byte, 0xf2 or 0xf3 is xacquire or xrelease
BOOL xAcquireRelease;
bool xAcquireRelease;
// Sizes of various critical pieces of data, in bytes
uint8_t registerSize;
@ -583,15 +581,15 @@ struct InternalInstruction {
// The ModR/M byte, which contains most register operands and some portion of
// all memory operands.
BOOL consumedModRM;
bool consumedModRM;
uint8_t modRM;
// The SIB byte, used for more complex 32- or 64-bit memory operands
BOOL consumedSIB;
bool consumedSIB;
uint8_t sib;
// The displacement, used for memory operands
BOOL consumedDisplacement;
bool consumedDisplacement;
int32_t displacement;
// Immediates. There can be two in some cases