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R600: Cleanup test

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Remove -CHECKs, use multiple prefixes, name values,
also test the @llvm.fabs version

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214525 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-08-01 17:00:29 +00:00
parent b3cecb1ce6
commit f8230857c0
1 changed files with 78 additions and 46 deletions
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124
test/CodeGen/R600/fabs.ll
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@ -1,66 +1,98 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; DAGCombiner will transform: ; DAGCombiner will transform:
; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF)) ; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))
; unless isFabsFree returns true ; unless isFabsFree returns true
; R600-CHECK-LABEL: @fabs_free ; FUNC-LABEL: @fabs_fn_free
; R600-CHECK-NOT: AND ; R600-NOT: AND
; R600-CHECK: |PV.{{[XYZW]}}| ; R600: |PV.{{[XYZW]}}|
; SI-CHECK-LABEL: @fabs_free
; SI-CHECK: V_AND_B32 ; SI: V_AND_B32
define void @fabs_fn_free(float addrspace(1)* %out, i32 %in) {
%bc= bitcast i32 %in to float
%fabs = call float @fabs(float %bc)
store float %fabs, float addrspace(1)* %out
ret void
}
; FUNC-LABEL: @fabs_free
; R600-NOT: AND
; R600: |PV.{{[XYZW]}}|
; SI: V_AND_B32
define void @fabs_free(float addrspace(1)* %out, i32 %in) { define void @fabs_free(float addrspace(1)* %out, i32 %in) {
entry: %bc= bitcast i32 %in to float
%0 = bitcast i32 %in to float %fabs = call float @llvm.fabs.f32(float %bc)
%1 = call float @fabs(float %0) store float %fabs, float addrspace(1)* %out
store float %1, float addrspace(1)* %out
ret void ret void
} }
; R600-CHECK-LABEL: @fabs_v2 ; FUNC-LABEL: @fabs_f32
; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}|
; SI-CHECK-LABEL: @fabs_v2 ; SI: V_AND_B32
; SI-CHECK: V_AND_B32 define void @fabs_f32(float addrspace(1)* %out, float %in) {
; SI-CHECK: V_AND_B32 %fabs = call float @llvm.fabs.f32(float %in)
define void @fabs_v2(<2 x float> addrspace(1)* %out, <2 x float> %in) { store float %fabs, float addrspace(1)* %out
entry:
%0 = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
store <2 x float> %0, <2 x float> addrspace(1)* %out
ret void ret void
} }
; R600-CHECK-LABEL: @fabs_v4 ; FUNC-LABEL: @fabs_v2f32
; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}|
; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| ; SI: V_AND_B32
; SI-CHECK-LABEL: @fabs_v4 ; SI: V_AND_B32
; SI-CHECK: V_AND_B32 define void @fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
; SI-CHECK: V_AND_B32 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
; SI-CHECK: V_AND_B32 store <2 x float> %fabs, <2 x float> addrspace(1)* %out
; SI-CHECK: V_AND_B32
define void @fabs_v4(<4 x float> addrspace(1)* %out, <4 x float> %in) {
entry:
%0 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
store <4 x float> %0, <4 x float> addrspace(1)* %out
ret void ret void
} }
; SI-CHECK-LABEL: @fabs_fold ; FUNC-LABEL: @fabs_v4
; SI-CHECK: S_LOAD_DWORD [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
; SI-CHECK-NOT: V_AND_B32_e32 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
; SI-CHECK: V_MUL_F32_e64 v{{[0-9]+}}, |[[ABS_VALUE]]|, v{{[0-9]+}} ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
; R600: |{{(PV|T[0-9])\.[XYZW]}}|
; SI: V_AND_B32
; SI: V_AND_B32
; SI: V_AND_B32
; SI: V_AND_B32
define void @fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
%fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
store <4 x float> %fabs, <4 x float> addrspace(1)* %out
ret void
}
; SI-LABEL: @fabs_fn_fold
; SI: S_LOAD_DWORD [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
; SI-NOT: V_AND_B32_e32
; SI: V_MUL_F32_e64 v{{[0-9]+}}, |[[ABS_VALUE]]|, v{{[0-9]+}}
define void @fabs_fn_fold(float addrspace(1)* %out, float %in0, float %in1) {
%fabs = call float @fabs(float %in0)
%fmul = fmul float %fabs, %in1
store float %fmul, float addrspace(1)* %out
ret void
}
; SI-LABEL: @fabs_fold
; SI: S_LOAD_DWORD [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
; SI-NOT: V_AND_B32_e32
; SI: V_MUL_F32_e64 v{{[0-9]+}}, |[[ABS_VALUE]]|, v{{[0-9]+}}
define void @fabs_fold(float addrspace(1)* %out, float %in0, float %in1) { define void @fabs_fold(float addrspace(1)* %out, float %in0, float %in1) {
entry: %fabs = call float @llvm.fabs.f32(float %in0)
%0 = call float @fabs(float %in0) %fmul = fmul float %fabs, %in1
%1 = fmul float %0, %in1 store float %fmul, float addrspace(1)* %out
store float %1, float addrspace(1)* %out
ret void ret void
} }
declare float @fabs(float ) readnone declare float @fabs(float) readnone
declare <2 x float> @llvm.fabs.v2f32(<2 x float> ) readnone declare float @llvm.fabs.f32(float) readnone
declare <4 x float> @llvm.fabs.v4f32(<4 x float> ) readnone declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone