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Add some basic reg-reg instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24777 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -170,7 +170,8 @@ let rd = 0, imm22 = 0 in
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// Section B.11 - Logical Instructions, p. 106
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def ANDrr : F3_1<2, 0b000001,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"and $b, $c, $dst", []>;
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"and $b, $c, $dst",
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[(set IntRegs:$dst, (and IntRegs:$b, IntRegs:$c))]>;
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def ANDri : F3_2<2, 0b000001,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"and $b, $c, $dst",
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@ -195,7 +196,8 @@ def ANDNCCri: F3_2<2, 0b010101,
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"andncc $b, $c, $dst", []>;
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def ORrr : F3_1<2, 0b000010,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"or $b, $c, $dst", []>;
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"or $b, $c, $dst",
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[(set IntRegs:$dst, (or IntRegs:$b, IntRegs:$c))]>;
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def ORri : F3_2<2, 0b000010,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"or $b, $c, $dst",
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@ -220,7 +222,8 @@ def ORNCCri : F3_2<2, 0b010110,
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"orncc $b, $c, $dst", []>;
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def XORrr : F3_1<2, 0b000011,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"xor $b, $c, $dst", []>;
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"xor $b, $c, $dst",
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[(set IntRegs:$dst, (xor IntRegs:$b, IntRegs:$c))]>;
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def XORri : F3_2<2, 0b000011,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"xor $b, $c, $dst",
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@ -267,7 +270,8 @@ def SRAri : F3_2<2, 0b100111,
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// Section B.13 - Add Instructions, p. 108
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def ADDrr : F3_1<2, 0b000000,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"add $b, $c, $dst", []>;
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"add $b, $c, $dst",
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[(set IntRegs:$dst, (add IntRegs:$b, IntRegs:$c))]>;
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def ADDri : F3_2<2, 0b000000,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"add $b, $c, $dst",
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@ -294,7 +298,8 @@ def ADDXCCri: F3_2<2, 0b011000,
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// Section B.15 - Subtract Instructions, p. 110
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def SUBrr : F3_1<2, 0b000100,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"sub $b, $c, $dst", []>;
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"sub $b, $c, $dst",
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[(set IntRegs:$dst, (sub IntRegs:$b, IntRegs:$c))]>;
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def SUBri : F3_2<2, 0b000100,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"sub $b, $c, $dst",
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@ -170,7 +170,8 @@ let rd = 0, imm22 = 0 in
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// Section B.11 - Logical Instructions, p. 106
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def ANDrr : F3_1<2, 0b000001,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"and $b, $c, $dst", []>;
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"and $b, $c, $dst",
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[(set IntRegs:$dst, (and IntRegs:$b, IntRegs:$c))]>;
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def ANDri : F3_2<2, 0b000001,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"and $b, $c, $dst",
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@ -195,7 +196,8 @@ def ANDNCCri: F3_2<2, 0b010101,
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"andncc $b, $c, $dst", []>;
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def ORrr : F3_1<2, 0b000010,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"or $b, $c, $dst", []>;
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"or $b, $c, $dst",
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[(set IntRegs:$dst, (or IntRegs:$b, IntRegs:$c))]>;
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def ORri : F3_2<2, 0b000010,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"or $b, $c, $dst",
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@ -220,7 +222,8 @@ def ORNCCri : F3_2<2, 0b010110,
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"orncc $b, $c, $dst", []>;
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def XORrr : F3_1<2, 0b000011,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"xor $b, $c, $dst", []>;
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"xor $b, $c, $dst",
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[(set IntRegs:$dst, (xor IntRegs:$b, IntRegs:$c))]>;
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def XORri : F3_2<2, 0b000011,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"xor $b, $c, $dst",
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@ -267,7 +270,8 @@ def SRAri : F3_2<2, 0b100111,
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// Section B.13 - Add Instructions, p. 108
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def ADDrr : F3_1<2, 0b000000,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"add $b, $c, $dst", []>;
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"add $b, $c, $dst",
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[(set IntRegs:$dst, (add IntRegs:$b, IntRegs:$c))]>;
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def ADDri : F3_2<2, 0b000000,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"add $b, $c, $dst",
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@ -294,7 +298,8 @@ def ADDXCCri: F3_2<2, 0b011000,
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// Section B.15 - Subtract Instructions, p. 110
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def SUBrr : F3_1<2, 0b000100,
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(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
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"sub $b, $c, $dst", []>;
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"sub $b, $c, $dst",
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[(set IntRegs:$dst, (sub IntRegs:$b, IntRegs:$c))]>;
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def SUBri : F3_2<2, 0b000100,
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(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
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"sub $b, $c, $dst",
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