Remove trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189178 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2013-08-24 19:50:11 +00:00
parent 0570be8404
commit f86778a848
2 changed files with 22 additions and 22 deletions

View File

@ -315,7 +315,7 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate,
// operand is 64 bits wide. Do nothing.
break;
}
if(!tryAddingSymbolicOperand(immediate + pcrel, isBranch, insn.startLocation,
insn.immediateOffset, insn.immediateSize,
mcInst, Dis))

View File

@ -278,28 +278,28 @@ def ptr_rc_nosp : PointerLikeRegClass<1>;
// *mem - Operand definitions for the funky X86 addressing mode operands.
//
def X86MemAsmOperand : AsmOperandClass {
let Name = "Mem"; let PredicateMethod = "isMem";
def X86MemAsmOperand : AsmOperandClass {
let Name = "Mem"; let PredicateMethod = "isMem";
}
def X86Mem8AsmOperand : AsmOperandClass {
def X86Mem8AsmOperand : AsmOperandClass {
let Name = "Mem8"; let PredicateMethod = "isMem8";
}
def X86Mem16AsmOperand : AsmOperandClass {
def X86Mem16AsmOperand : AsmOperandClass {
let Name = "Mem16"; let PredicateMethod = "isMem16";
}
def X86Mem32AsmOperand : AsmOperandClass {
def X86Mem32AsmOperand : AsmOperandClass {
let Name = "Mem32"; let PredicateMethod = "isMem32";
}
def X86Mem64AsmOperand : AsmOperandClass {
def X86Mem64AsmOperand : AsmOperandClass {
let Name = "Mem64"; let PredicateMethod = "isMem64";
}
def X86Mem80AsmOperand : AsmOperandClass {
def X86Mem80AsmOperand : AsmOperandClass {
let Name = "Mem80"; let PredicateMethod = "isMem80";
}
def X86Mem128AsmOperand : AsmOperandClass {
def X86Mem128AsmOperand : AsmOperandClass {
let Name = "Mem128"; let PredicateMethod = "isMem128";
}
def X86Mem256AsmOperand : AsmOperandClass {
def X86Mem256AsmOperand : AsmOperandClass {
let Name = "Mem256"; let PredicateMethod = "isMem256";
}
@ -343,29 +343,29 @@ def opaque48mem : X86MemOperand<"printopaquemem">;
def opaque80mem : X86MemOperand<"printopaquemem">;
def opaque512mem : X86MemOperand<"printopaquemem">;
def i8mem : X86MemOperand<"printi8mem"> {
def i8mem : X86MemOperand<"printi8mem"> {
let ParserMatchClass = X86Mem8AsmOperand; }
def i16mem : X86MemOperand<"printi16mem"> {
def i16mem : X86MemOperand<"printi16mem"> {
let ParserMatchClass = X86Mem16AsmOperand; }
def i32mem : X86MemOperand<"printi32mem"> {
def i32mem : X86MemOperand<"printi32mem"> {
let ParserMatchClass = X86Mem32AsmOperand; }
def i64mem : X86MemOperand<"printi64mem"> {
def i64mem : X86MemOperand<"printi64mem"> {
let ParserMatchClass = X86Mem64AsmOperand; }
def i128mem : X86MemOperand<"printi128mem"> {
def i128mem : X86MemOperand<"printi128mem"> {
let ParserMatchClass = X86Mem128AsmOperand; }
def i256mem : X86MemOperand<"printi256mem"> {
def i256mem : X86MemOperand<"printi256mem"> {
let ParserMatchClass = X86Mem256AsmOperand; }
def i512mem : X86MemOperand<"printi512mem"> {
def i512mem : X86MemOperand<"printi512mem"> {
let ParserMatchClass = X86Mem512AsmOperand; }
def f32mem : X86MemOperand<"printf32mem"> {
def f32mem : X86MemOperand<"printf32mem"> {
let ParserMatchClass = X86Mem32AsmOperand; }
def f64mem : X86MemOperand<"printf64mem"> {
def f64mem : X86MemOperand<"printf64mem"> {
let ParserMatchClass = X86Mem64AsmOperand; }
def f80mem : X86MemOperand<"printf80mem"> {
def f80mem : X86MemOperand<"printf80mem"> {
let ParserMatchClass = X86Mem80AsmOperand; }
def f128mem : X86MemOperand<"printf128mem"> {
def f128mem : X86MemOperand<"printf128mem"> {
let ParserMatchClass = X86Mem128AsmOperand; }
def f256mem : X86MemOperand<"printf256mem">{
def f256mem : X86MemOperand<"printf256mem">{
let ParserMatchClass = X86Mem256AsmOperand; }
def f512mem : X86MemOperand<"printf512mem">{
let ParserMatchClass = X86Mem512AsmOperand; }