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[mips] Trap on integer division by zero.

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By default, a teq instruction is inserted after integer divide. No divide-by-zero
checks are performed if option "-mnocheck-zero-division" is used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182306 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka
2013-05-20 18:07:43 +00:00
parent 08f92c98ac
commit f894199a14
6 changed files with 99 additions and 16 deletions
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36
test/CodeGen/Mips/divrem.ll
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@@ -1,34 +1,56 @@
; RUN: llc -march=mips < %s | FileCheck %s
; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=TRAP
; RUN: llc -march=mips -mnocheck-zero-division < %s |\
; RUN: FileCheck %s -check-prefix=NOCHECK
; TRAP: sdiv1:
; TRAP: div $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; TRAP: teq $[[R0]], $zero, 7
; TRAP: mflo
; NOCHECK: sdiv1:
; NOCHECK-NOT: teq
; NOCHECK: .end sdiv1
; CHECK: div $zero,
define i32 @sdiv1(i32 %a0, i32 %a1) nounwind readnone {
entry:
%div = sdiv i32 %a0, %a1
ret i32 %div
}
; CHECK: div $zero,
; TRAP: srem1:
; TRAP: div $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; TRAP: teq $[[R0]], $zero, 7
; TRAP: mfhi
define i32 @srem1(i32 %a0, i32 %a1) nounwind readnone {
entry:
%rem = srem i32 %a0, %a1
ret i32 %rem
}
; CHECK: divu $zero,
; TRAP: udiv1:
; TRAP: divu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; TRAP: teq $[[R0]], $zero, 7
; TRAP: mflo
define i32 @udiv1(i32 %a0, i32 %a1) nounwind readnone {
entry:
%div = udiv i32 %a0, %a1
ret i32 %div
}
; CHECK: divu $zero,
; TRAP: urem1:
; TRAP: divu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; TRAP: teq $[[R0]], $zero, 7
; TRAP: mfhi
define i32 @urem1(i32 %a0, i32 %a1) nounwind readnone {
entry:
%rem = urem i32 %a0, %a1
ret i32 %rem
}
; CHECK: div $zero,
; TRAP: div $zero,
define i32 @sdivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
entry:
%rem = srem i32 %a0, %a1
@@ -37,7 +59,7 @@ entry:
ret i32 %div
}
; CHECK: divu $zero,
; TRAP: divu $zero,
define i32 @udivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
entry:
%rem = urem i32 %a0, %a1