mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-18 13:34:04 +00:00
Add rawfrm flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4841 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
a4978ccbcb
commit
f8bafe8fdb
@ -78,6 +78,10 @@ static bool isImmediate(const MachineOperand &MO) {
|
|||||||
MO.getType() == MachineOperand::MO_UnextendedImmed;
|
MO.getType() == MachineOperand::MO_UnextendedImmed;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool isPCRelativeDisp(const MachineOperand &MO) {
|
||||||
|
return MO.getType() == MachineOperand::MO_PCRelativeDisp;
|
||||||
|
}
|
||||||
|
|
||||||
static bool isScale(const MachineOperand &MO) {
|
static bool isScale(const MachineOperand &MO) {
|
||||||
return isImmediate(MO) &&
|
return isImmediate(MO) &&
|
||||||
(MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
|
(MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
|
||||||
@ -105,6 +109,9 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
|
|||||||
case MachineOperand::MO_UnextendedImmed:
|
case MachineOperand::MO_UnextendedImmed:
|
||||||
O << (int)MO.getImmedValue();
|
O << (int)MO.getImmedValue();
|
||||||
return;
|
return;
|
||||||
|
case MachineOperand::MO_PCRelativeDisp:
|
||||||
|
O << "< " << MO.getVRegValue()->getName() << ">";
|
||||||
|
return;
|
||||||
default:
|
default:
|
||||||
O << "<unknown op ty>"; return;
|
O << "<unknown op ty>"; return;
|
||||||
}
|
}
|
||||||
@ -305,13 +312,25 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case X86II::RawFrm:
|
case X86II::RawFrm:
|
||||||
toHex(O, getBaseOpcodeFor(Opcode));
|
// The accepted forms of Raw instructions are:
|
||||||
|
// 1. nop - No operand required
|
||||||
|
// 2. jmp foo - PC relative displacement operand
|
||||||
|
//
|
||||||
|
assert(MI->getNumOperands() == 0 ||
|
||||||
|
(MI->getNumOperands() == 1 && isPCRelativeDisp(MI->getOperand(0))) &&
|
||||||
|
"Illegal raw instruction!");
|
||||||
|
toHex(O, getBaseOpcodeFor(Opcode)) << " ";
|
||||||
|
|
||||||
|
if (MI->getNumOperands() == 1) {
|
||||||
|
Value *V = MI->getOperand(0).getVRegValue();
|
||||||
|
emitConstant(O, 0, 4);
|
||||||
|
}
|
||||||
|
|
||||||
O << "\n\t\t\t\t";
|
O << "\n\t\t\t\t";
|
||||||
O << getName(MI->getOpCode()) << " ";
|
O << getName(MI->getOpCode()) << " ";
|
||||||
|
|
||||||
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
if (MI->getNumOperands() == 1) {
|
||||||
if (i) O << ", ";
|
printOp(O, MI->getOperand(0), RI);
|
||||||
printOp(O, MI->getOperand(i), RI);
|
|
||||||
}
|
}
|
||||||
O << "\n";
|
O << "\n";
|
||||||
return;
|
return;
|
||||||
|
@ -78,6 +78,10 @@ static bool isImmediate(const MachineOperand &MO) {
|
|||||||
MO.getType() == MachineOperand::MO_UnextendedImmed;
|
MO.getType() == MachineOperand::MO_UnextendedImmed;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool isPCRelativeDisp(const MachineOperand &MO) {
|
||||||
|
return MO.getType() == MachineOperand::MO_PCRelativeDisp;
|
||||||
|
}
|
||||||
|
|
||||||
static bool isScale(const MachineOperand &MO) {
|
static bool isScale(const MachineOperand &MO) {
|
||||||
return isImmediate(MO) &&
|
return isImmediate(MO) &&
|
||||||
(MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
|
(MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
|
||||||
@ -105,6 +109,9 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
|
|||||||
case MachineOperand::MO_UnextendedImmed:
|
case MachineOperand::MO_UnextendedImmed:
|
||||||
O << (int)MO.getImmedValue();
|
O << (int)MO.getImmedValue();
|
||||||
return;
|
return;
|
||||||
|
case MachineOperand::MO_PCRelativeDisp:
|
||||||
|
O << "< " << MO.getVRegValue()->getName() << ">";
|
||||||
|
return;
|
||||||
default:
|
default:
|
||||||
O << "<unknown op ty>"; return;
|
O << "<unknown op ty>"; return;
|
||||||
}
|
}
|
||||||
@ -305,13 +312,25 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case X86II::RawFrm:
|
case X86II::RawFrm:
|
||||||
toHex(O, getBaseOpcodeFor(Opcode));
|
// The accepted forms of Raw instructions are:
|
||||||
|
// 1. nop - No operand required
|
||||||
|
// 2. jmp foo - PC relative displacement operand
|
||||||
|
//
|
||||||
|
assert(MI->getNumOperands() == 0 ||
|
||||||
|
(MI->getNumOperands() == 1 && isPCRelativeDisp(MI->getOperand(0))) &&
|
||||||
|
"Illegal raw instruction!");
|
||||||
|
toHex(O, getBaseOpcodeFor(Opcode)) << " ";
|
||||||
|
|
||||||
|
if (MI->getNumOperands() == 1) {
|
||||||
|
Value *V = MI->getOperand(0).getVRegValue();
|
||||||
|
emitConstant(O, 0, 4);
|
||||||
|
}
|
||||||
|
|
||||||
O << "\n\t\t\t\t";
|
O << "\n\t\t\t\t";
|
||||||
O << getName(MI->getOpCode()) << " ";
|
O << getName(MI->getOpCode()) << " ";
|
||||||
|
|
||||||
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
if (MI->getNumOperands() == 1) {
|
||||||
if (i) O << ", ";
|
printOp(O, MI->getOperand(0), RI);
|
||||||
printOp(O, MI->getOperand(i), RI);
|
|
||||||
}
|
}
|
||||||
O << "\n";
|
O << "\n";
|
||||||
return;
|
return;
|
||||||
|
@ -36,9 +36,9 @@ I(NOOP , "nop", 0x90, 0, X86II::RawFrm | X86II::Void)
|
|||||||
|
|
||||||
// Flow control instructions
|
// Flow control instructions
|
||||||
I(RET , "ret", 0xCB, M_RET_FLAG, X86II::RawFrm | X86II::Void) // ret
|
I(RET , "ret", 0xCB, M_RET_FLAG, X86II::RawFrm | X86II::Void) // ret
|
||||||
I(JMP , "jmp", 0xE9, M_BRANCH_FLAG, X86II::Void) // jmp foo
|
I(JMP , "jmp", 0xE9, M_BRANCH_FLAG, X86II::RawFrm | X86II::Void) // jmp foo
|
||||||
I(JNE , "jne", 0x85, M_BRANCH_FLAG, X86II::TB | X86II::Void)
|
I(JNE , "jne", 0x85, M_BRANCH_FLAG, X86II::RawFrm | X86II::TB | X86II::Void)
|
||||||
I(JE , "je", 0x84, M_BRANCH_FLAG, X86II::TB | X86II::Void)
|
I(JE , "je", 0x84, M_BRANCH_FLAG, X86II::RawFrm | X86II::TB | X86II::Void)
|
||||||
I(CALLpcrel32 , "call", 0xE8, M_BRANCH_FLAG, X86II::Void)
|
I(CALLpcrel32 , "call", 0xE8, M_BRANCH_FLAG, X86II::Void)
|
||||||
|
|
||||||
// Misc instructions
|
// Misc instructions
|
||||||
|
Loading…
x
Reference in New Issue
Block a user