6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-23 17:29:19 +00:00
Code Issues Projects Releases Wiki Activity

[X86][Haswell][SchedModel] Add architecture specific scheduling models.

Browse Source 
Group: Floating Point x87 instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215913 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet 2014-08-18 17:55:32 +00:00
parent 435fa2bddf
commit f8da7e552c
1 changed files with 16 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
lib/Target/X86/X86SchedHaswell.td
View File

@ -1175,4 +1175,20 @@ def WriteFRNDINT : SchedWriteRes<[]> {
}
def : InstRW<[WriteFRNDINT], (instregex "FRNDINT")>;
//-- Math instructions --//
// FSCALE.
def WriteFSCALE : SchedWriteRes<[]> {
let Latency = 75; // 49-125
let NumMicroOps = 50; // 25-75
}
def : InstRW<[WriteFSCALE], (instregex "FSCALE")>;
// FXTRACT.
def WriteFXTRACT : SchedWriteRes<[]> {
let Latency = 15;
let NumMicroOps = 17;
}
def : InstRW<[WriteFXTRACT], (instregex "FXTRACT")>;
} // SchedModel