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Don't give implicit machine operands special treatment in the register scavenger.
Imp-def is *not* allowed to redefine a live register. Imp-use is *not* allowed to use a dead register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78106 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -226,7 +226,7 @@ void RegScavenger::forward() {
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const MachineOperand MO = *UseMOs[i].first;
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unsigned Reg = MO.getReg();
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assert((MO.isImplicit() || isUsed(Reg)) && "Using an undefined register!");
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assert(isUsed(Reg) && "Using an undefined register!");
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if (MO.isKill() && !isReserved(Reg)) {
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KillRegs.set(Reg);
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@ -276,10 +276,7 @@ void RegScavenger::forward() {
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if (RedefinesSuperRegPart(MI, MO, TRI))
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continue;
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// Implicit def is allowed to "re-define" any register. Similarly,
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// implicitly defined registers can be clobbered.
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assert((MO.isImplicit() || isReserved(Reg) || isUnused(Reg) ||
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isSuperRegUsed(Reg) ||
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assert((isReserved(Reg) || isUnused(Reg) || isSuperRegUsed(Reg) ||
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isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) &&
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"Re-defining a live register!");
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setUsed(Reg);
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