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Hexagon: Clear isKill flag on the predicate register in
PredicateInstruction function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180884 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1811,11 +1811,15 @@ PredicateInstruction(MachineInstr *MI,
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// It is better to have an assert here to check this. But I don't know how
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// to write this assert because findFirstPredOperandIdx() would return -1
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if (oper < -1) oper = -1;
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MI->getOperand(oper+1).ChangeToRegister(PredMO.getReg(), PredMO.isDef(),
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PredMO.isImplicit(), PredMO.isKill(),
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PredMO.isImplicit(), false,
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PredMO.isDead(), PredMO.isUndef(),
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PredMO.isDebug());
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MachineRegisterInfo &RegInfo = MI->getParent()->getParent()->getRegInfo();
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RegInfo.clearKillFlags(PredMO.getReg());
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if (hasGAOpnd)
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{
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unsigned int i;
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