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https://github.com/c64scene-ar/llvm-6502.git
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eliminate use of getNode that takes vector of valuetypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29687 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3665,8 +3665,8 @@ void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp,
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ExpandOp(Op, LHSL, LHSH);
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SDOperand Ops[] = { LHSL, LHSH, Amt };
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std::vector<MVT::ValueType> VTs(2, LHSL.getValueType());
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Lo = DAG.getNode(NodeOp, VTs, Ops, 3);
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MVT::ValueType VT = LHSL.getValueType();
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Lo = DAG.getNode(NodeOp, DAG.getNodeValueTypes(VT, VT), 2, Ops, 3);
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Hi = Lo.getValue(1);
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}
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@ -4636,22 +4636,21 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
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SDOperand LHSL, LHSH, RHSL, RHSH;
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ExpandOp(Node->getOperand(0), LHSL, LHSH);
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ExpandOp(Node->getOperand(1), RHSL, RHSH);
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std::vector<MVT::ValueType> VTs;
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const MVT::ValueType *VTs =
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DAG.getNodeValueTypes(LHSL.getValueType(),MVT::Flag);
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SDOperand LoOps[2], HiOps[2];
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VTs.push_back(LHSL.getValueType());
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VTs.push_back(MVT::Flag);
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LoOps[0] = LHSL;
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LoOps[1] = RHSL;
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HiOps[0] = LHSH;
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HiOps[1] = RHSH;
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if (Node->getOpcode() == ISD::ADD) {
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Lo = DAG.getNode(ISD::ADDC, VTs, LoOps, 2);
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Lo = DAG.getNode(ISD::ADDC, VTs, 2, LoOps, 2);
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HiOps[2] = Lo.getValue(1);
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Hi = DAG.getNode(ISD::ADDE, VTs, HiOps, 3);
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Hi = DAG.getNode(ISD::ADDE, VTs, 2, HiOps, 3);
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} else {
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Lo = DAG.getNode(ISD::SUBC, VTs, LoOps, 2);
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Lo = DAG.getNode(ISD::SUBC, VTs, 2, LoOps, 2);
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HiOps[2] = Lo.getValue(1);
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Hi = DAG.getNode(ISD::SUBE, VTs, HiOps, 3);
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Hi = DAG.getNode(ISD::SUBE, VTs, 2, HiOps, 3);
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}
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break;
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}
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@ -1346,11 +1346,10 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) {
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getIntPtrConstant(~(uint64_t)(StackAlign-1)));
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}
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std::vector<MVT::ValueType> VTs;
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VTs.push_back(AllocSize.getValueType());
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VTs.push_back(MVT::Other);
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SDOperand Ops[] = { getRoot(), AllocSize, getIntPtrConstant(Align) };
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SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, Ops, 3);
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const MVT::ValueType *VTs = DAG.getNodeValueTypes(AllocSize.getValueType(),
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MVT::Other);
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SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, 2, Ops, 3);
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DAG.setRoot(setValue(&I, DSA).getValue(1));
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// Inform the Frame Information that we have just allocated a variable-sized
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@ -1476,14 +1475,19 @@ void SelectionDAGLowering::visitTargetIntrinsic(CallInst &I,
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if (HasChain)
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VTs.push_back(MVT::Other);
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const MVT::ValueType *VTList = DAG.getNodeValueTypes(VTs);
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// Create the node.
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SDOperand Result;
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if (!HasChain)
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Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, VTs, &Ops[0], Ops.size());
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Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, VTList, VTs.size(),
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&Ops[0], Ops.size());
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else if (I.getType() != Type::VoidTy)
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Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, VTs, &Ops[0], Ops.size());
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Result = DAG.getNode(ISD::INTRINSIC_W_CHAIN, VTList, VTs.size(),
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&Ops[0], Ops.size());
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else
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Result = DAG.getNode(ISD::INTRINSIC_VOID, VTs, &Ops[0], Ops.size());
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Result = DAG.getNode(ISD::INTRINSIC_VOID, VTList, VTs.size(),
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&Ops[0], Ops.size());
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if (HasChain) {
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SDOperand Chain = Result.getValue(Result.Val->getNumValues()-1);
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@ -1623,11 +1627,10 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
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return 0;
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}
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case Intrinsic::readcyclecounter: {
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std::vector<MVT::ValueType> VTs;
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VTs.push_back(MVT::i64);
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VTs.push_back(MVT::Other);
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SDOperand Op = getRoot();
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SDOperand Tmp = DAG.getNode(ISD::READCYCLECOUNTER, VTs, &Op, 1);
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SDOperand Tmp = DAG.getNode(ISD::READCYCLECOUNTER,
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DAG.getNodeValueTypes(MVT::i64, MVT::Other), 2,
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&Op, 1);
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setValue(&I, Tmp);
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DAG.setRoot(Tmp.getValue(1));
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return 0;
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@ -1664,11 +1667,9 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
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getValue(I.getOperand(1))));
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return 0;
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case Intrinsic::stacksave: {
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std::vector<MVT::ValueType> VTs;
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VTs.push_back(TLI.getPointerTy());
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VTs.push_back(MVT::Other);
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SDOperand Op = getRoot();
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SDOperand Tmp = DAG.getNode(ISD::STACKSAVE, VTs, &Op, 1);
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SDOperand Tmp = DAG.getNode(ISD::STACKSAVE,
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DAG.getNodeValueTypes(TLI.getPointerTy(), MVT::Other), 2, &Op, 1);
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setValue(&I, Tmp);
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DAG.setRoot(Tmp.getValue(1));
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return 0;
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@ -2256,10 +2257,8 @@ void SelectionDAGLowering::visitInlineAsm(CallInst &I) {
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AsmNodeOperands[0] = Chain;
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if (Flag.Val) AsmNodeOperands.push_back(Flag);
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std::vector<MVT::ValueType> VTs;
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VTs.push_back(MVT::Other);
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VTs.push_back(MVT::Flag);
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Chain = DAG.getNode(ISD::INLINEASM, VTs,
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Chain = DAG.getNode(ISD::INLINEASM,
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DAG.getNodeValueTypes(MVT::Other, MVT::Flag), 2,
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&AsmNodeOperands[0], AsmNodeOperands.size());
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Flag = Chain.getValue(1);
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@ -2428,7 +2427,8 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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RetVals.push_back(MVT::Other);
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// Create the node.
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SDNode *Result = DAG.getNode(ISD::FORMAL_ARGUMENTS, RetVals,
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SDNode *Result = DAG.getNode(ISD::FORMAL_ARGUMENTS,
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DAG.getNodeValueTypes(RetVals), RetVals.size(),
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&Ops[0], Ops.size()).Val;
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DAG.setRoot(SDOperand(Result, Result->getNumValues()-1));
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@ -2636,7 +2636,8 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
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RetTys.push_back(MVT::Other); // Always has a chain.
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// Finally, create the CALL node.
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SDOperand Res = DAG.getNode(ISD::CALL, RetTys, &Ops[0], Ops.size());
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SDOperand Res = DAG.getNode(ISD::CALL, DAG.getNodeValueTypes(RetTys),
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RetTys.size(), &Ops[0], Ops.size());
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// This returns a pair of operands. The first element is the
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// return value for the function (if RetTy is not VoidTy). The second
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