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This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-10-09 20:11:35 +00:00
parent 60de63d0b6
commit fa08fb2c78
2 changed files with 21 additions and 0 deletions
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19
lib/Target/Alpha/AlphaRegisterInfo.cpp
View File

@ -107,6 +107,25 @@ AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
abort();
}
unsigned
AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
{
switch (MI->getOpcode()) {
case Alpha::LDL:
case Alpha::LDQ:
case Alpha::LDBU:
case Alpha::LDWU:
case Alpha::LDS:
case Alpha::LDT:
if (MI->getOperand(1).isFrameIndex()) {
FrameIndex = MI->getOperand(1).getFrameIndex();
return MI->getOperand(0).getReg();
}
break;
}
return 0;
}
void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,

2
lib/Target/Alpha/AlphaRegisterInfo.h
View File

@ -34,6 +34,8 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
MachineBasicBlock::iterator MBBI,
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC) const;
virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg,