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This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -107,6 +107,25 @@ AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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abort();
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abort();
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}
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}
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unsigned
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AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
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{
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switch (MI->getOpcode()) {
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case Alpha::LDL:
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case Alpha::LDQ:
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case Alpha::LDBU:
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case Alpha::LDWU:
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case Alpha::LDS:
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case Alpha::LDT:
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if (MI->getOperand(1).isFrameIndex()) {
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FrameIndex = MI->getOperand(1).getFrameIndex();
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return MI->getOperand(0).getReg();
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}
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break;
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}
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return 0;
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}
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void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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MachineBasicBlock::iterator MI,
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unsigned DestReg, unsigned SrcReg,
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unsigned DestReg, unsigned SrcReg,
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@ -34,6 +34,8 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
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MachineBasicBlock::iterator MBBI,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex,
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC) const;
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const TargetRegisterClass *RC) const;
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virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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unsigned DestReg, unsigned SrcReg,
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unsigned DestReg, unsigned SrcReg,
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