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Use getTargetConstant instead of getConstant for nodes that should not be visited
by isel and potentially forced into registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58747 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1332,7 +1332,7 @@ SDValue SPU::get_vec_u18imm(SDNode *N, SelectionDAG &DAG,
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Value = Value >> 32;
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}
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if (Value <= 0x3ffff)
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return DAG.getConstant(Value, ValueType);
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return DAG.getTargetConstant(Value, ValueType);
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}
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return SDValue();
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@ -1354,7 +1354,7 @@ SDValue SPU::get_vec_i16imm(SDNode *N, SelectionDAG &DAG,
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Value = Value >> 32;
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}
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if (Value >= -(1 << 15) && Value <= ((1 << 15) - 1)) {
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return DAG.getConstant(Value, ValueType);
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return DAG.getTargetConstant(Value, ValueType);
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}
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}
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@ -1377,7 +1377,7 @@ SDValue SPU::get_vec_i10imm(SDNode *N, SelectionDAG &DAG,
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Value = Value >> 32;
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}
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if (isS10Constant(Value))
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return DAG.getConstant(Value, ValueType);
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return DAG.getTargetConstant(Value, ValueType);
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}
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return SDValue();
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@ -1397,10 +1397,10 @@ SDValue SPU::get_vec_i8imm(SDNode *N, SelectionDAG &DAG,
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if (ValueType == MVT::i16
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&& Value <= 0xffff /* truncated from uint64_t */
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&& ((short) Value >> 8) == ((short) Value & 0xff))
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return DAG.getConstant(Value & 0xff, ValueType);
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return DAG.getTargetConstant(Value & 0xff, ValueType);
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else if (ValueType == MVT::i8
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&& (Value & 0xff) == Value)
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return DAG.getConstant(Value, ValueType);
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return DAG.getTargetConstant(Value, ValueType);
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}
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return SDValue();
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@ -1416,7 +1416,7 @@ SDValue SPU::get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
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if ((ValueType == MVT::i32
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&& ((unsigned) Value & 0xffff0000) == (unsigned) Value)
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|| (ValueType == MVT::i64 && (Value & 0xffff0000) == Value))
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return DAG.getConstant(Value >> 16, ValueType);
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return DAG.getTargetConstant(Value >> 16, ValueType);
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}
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return SDValue();
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@ -1425,7 +1425,7 @@ SDValue SPU::get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG,
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/// get_v4i32_imm - Catch-all for general 32-bit constant vectors
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SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) {
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if (ConstantSDNode *CN = getVecImm(N)) {
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return DAG.getConstant((unsigned) CN->getZExtValue(), MVT::i32);
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return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i32);
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}
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return SDValue();
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@ -1434,7 +1434,7 @@ SDValue SPU::get_v4i32_imm(SDNode *N, SelectionDAG &DAG) {
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/// get_v4i32_imm - Catch-all for general 64-bit constant vectors
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SDValue SPU::get_v2i64_imm(SDNode *N, SelectionDAG &DAG) {
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if (ConstantSDNode *CN = getVecImm(N)) {
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return DAG.getConstant((unsigned) CN->getZExtValue(), MVT::i64);
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return DAG.getTargetConstant((unsigned) CN->getZExtValue(), MVT::i64);
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}
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return SDValue();
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