Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78030 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-08-04 01:41:15 +00:00
parent a599bff101
commit fa2ea1a8cf
2 changed files with 28 additions and 3 deletions

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@ -83,6 +83,10 @@ def imm0_4095_neg : PatLeaf<(i32 imm), [{
return (uint32_t)(-N->getZExtValue()) < 4096;
}], imm_neg_XFORM>;
def imm0_255_neg : PatLeaf<(i32 imm), [{
return (uint32_t)(-N->getZExtValue()) < 255;
}], imm_neg_XFORM>;
/// imm0_65535 predicate - True if the 32-bit immediate is in the range
/// [0.65535].
def imm0_65535 : PatLeaf<(i32 imm), [{
@ -619,12 +623,12 @@ def t2STRB_POST : T2Iidxldst<(outs GPR:$base_wb),
let mayLoad = 1 in
def t2LDM : T2XI<(outs),
(ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
"ldm${addr:submode}${p}.w $addr, $dst1", []>;
"ldm${addr:submode}${p} $addr, $dst1", []>;
let mayStore = 1 in
def t2STM : T2XI<(outs),
(ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops),
"stm${addr:submode}${p}.w $addr, $src1", []>;
"stm${addr:submode}${p} $addr, $src1", []>;
//===----------------------------------------------------------------------===//
// Move Instructions.
@ -704,6 +708,9 @@ defm t2RSB : T2I_rbin_is <"rsb", BinOpFrag<(sub node:$LHS, node:$RHS)>>;
defm t2RSBS : T2I_rbin_s_is <"rsb", BinOpFrag<(subc node:$LHS, node:$RHS)>>;
// (sub X, imm) gets canonicalized to (add X, -imm). Match this form.
let AddedComplexity = 1 in
def : T2Pat<(add GPR:$src, imm0_255_neg:$imm),
(t2SUBri GPR:$src, imm0_255_neg:$imm)>;
def : T2Pat<(add GPR:$src, t2_so_imm_neg:$imm),
(t2SUBri GPR:$src, t2_so_imm_neg:$imm)>;
def : T2Pat<(add GPR:$src, imm0_4095_neg:$imm),

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@ -1,31 +1,49 @@
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {sub\\.w\\W*r\[0-9\],\\W*r\[0-9\],\\W*#\[0-9\]*} | grep {#171\\|#1179666\\|#872428544\\|#1448498774\\|#510} | count 5
; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
; 171 = 0x000000ab
define i32 @f1(i32 %a) {
; CHECK: f1:
; CHECK: sub.w r0, r0, #171
%tmp = sub i32 %a, 171
ret i32 %tmp
}
; 1179666 = 0x00120012
define i32 @f2(i32 %a) {
; CHECK: f2:
; CHECK: sub.w r0, r0, #1179666
%tmp = sub i32 %a, 1179666
ret i32 %tmp
}
; 872428544 = 0x34003400
define i32 @f3(i32 %a) {
; CHECK: f3:
; CHECK: sub.w r0, r0, #872428544
%tmp = sub i32 %a, 872428544
ret i32 %tmp
}
; 1448498774 = 0x56565656
define i32 @f4(i32 %a) {
; CHECK: f4:
; CHECK: sub.w r0, r0, #1448498774
%tmp = sub i32 %a, 1448498774
ret i32 %tmp
}
; 510 = 0x000001fe
define i32 @f5(i32 %a) {
; CHECK: f5:
; CHECK: sub.w r0, r0, #510
%tmp = sub i32 %a, 510
ret i32 %tmp
}
; Don't change this to an add.
define i32 @f6(i32 %a) {
; CHECK: f6:
; CHECK: sub.w r0, r0, #1
%tmp = sub i32 %a, 1
ret i32 %tmp
}