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repair x86 performance, dejagnu problems from previous change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -883,7 +883,8 @@ public:
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/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
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/// and GV works for isLegalAddressImmediate _and_ both can be applied
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/// simultaneously to the same instruction.
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virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV) const;
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virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
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const Type* Ty) const;
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//===--------------------------------------------------------------------===//
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// Div utility functions
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@ -1969,8 +1969,8 @@ bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
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/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
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/// and GV works for isLegalAddressImmediate _and_ both can be applied
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/// simultaneously to the same instruction.
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bool TargetLowering::isLegalAddressScaleAndImm(int64_t S,
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GlobalValue *GV) const {
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bool TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
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const Type* Ty) const {
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return false;
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}
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@ -1392,8 +1392,8 @@ bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
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/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
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/// and GV works for isLegalAddressImmediate _and_ both can be applied
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/// simultaneously to the same instruction.
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bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S,
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GlobalValue *GV) const {
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bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
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const Type* Ty) const {
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return false;
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}
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@ -109,7 +109,8 @@ namespace llvm {
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/// isLegalAddressScaleAndImm - Return true if S works for
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/// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
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/// both can be applied simultaneously to the same instruction.
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virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV) const;
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virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
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const Type *Ty) const;
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/// getPreIndexedAddressParts - returns true by value, base pointer and
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/// offset pointer and addressing mode by reference if the node's address
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@ -4064,6 +4064,22 @@ bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
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}
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}
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/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
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/// and V works for isLegalAddressImmediate _and_ both can be applied
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/// simultaneously to the same instruction.
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bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
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const Type* Ty) const {
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return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(V, Ty);
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}
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/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
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/// and GV works for isLegalAddressImmediate _and_ both can be applied
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/// simultaneously to the same instruction.
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bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
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const Type* Ty) const {
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return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(GV);
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}
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/// isShuffleMaskLegal - Targets can use this to indicate that they only
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/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
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/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
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@ -349,6 +349,18 @@ namespace llvm {
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/// type.
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virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
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/// isLegalAddressScaleAndImm - Return true if S works for
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/// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
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/// both can be applied simultaneously to the same instruction.
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virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
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const Type *Ty) const;
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/// isLegalAddressScaleAndImm - Return true if S works for
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/// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
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/// both can be applied simultaneously to the same instruction.
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virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
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const Type *Ty) const;
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/// isShuffleMaskLegal - Targets can use this to indicate that they only
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/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
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/// By default, if a target supports the VECTOR_SHUFFLE node, all mask
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