diff --git a/test/CodeGen/Mips/octeon.ll b/test/CodeGen/Mips/octeon.ll
index f7fbfb1f6e6..97e12e721f5 100644
--- a/test/CodeGen/Mips/octeon.ll
+++ b/test/CodeGen/Mips/octeon.ll
@@ -1,15 +1,14 @@
-; RUN: llc -O1 < %s -march=mips64 -mcpu=octeon | FileCheck %s -check-prefix=OCTEON
-; RUN: llc -O1 < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=MIPS64
+; RUN: llc -O1 < %s -march=mips64 -mcpu=octeon | FileCheck %s -check-prefix=ALL -check-prefix=OCTEON
+; RUN: llc -O1 < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=ALL -check-prefix=MIPS64
 
 define i64 @addi64(i64 %a, i64 %b) nounwind {
 entry:
-; OCTEON-LABEL: addi64:
+; ALL-LABEL: addi64:
 ; OCTEON: jr      $ra
 ; OCTEON: baddu   $2, $4, $5
-; MIPS64-LABEL: addi64:
-; MIPS64: daddu
-; MIPS64: jr
-; MIPS64: andi
+; MIPS64: daddu   $[[T0:[0-9]+]], $4, $5
+; MIPS64: jr      $ra
+; MIPS64: andi    $2, $[[T0]], 255
   %add = add i64 %a, %b
   %and = and i64 %add, 255
   ret i64 %and
@@ -17,28 +16,26 @@ entry:
 
 define i64 @mul(i64 %a, i64 %b) nounwind {
 entry:
-; OCTEON-LABEL: mul:
+; ALL-LABEL: mul:
 ; OCTEON: jr    $ra
 ; OCTEON: dmul  $2, $4, $5
-; MIPS64-LABEL: mul:
-; MIPS64: dmult
-; MIPS64: jr
-; MIPS64: mflo
+; MIPS64: dmult $4, $5
+; MIPS64: jr    $ra
+; MIPS64: mflo  $2
   %res = mul i64 %a, %b
   ret i64 %res
 }
 
 define i64 @cmpeq(i64 %a, i64 %b) nounwind {
 entry:
-; OCTEON-LABEL: cmpeq:
+; ALL-LABEL: cmpeq:
 ; OCTEON: jr     $ra
 ; OCTEON: seq    $2, $4, $5
-; MIPS64-LABEL: cmpeq:
-; MIPS64: xor    $1, $4, $5
-; MIPS64: sltiu  $1, $1, 1
-; MIPS64: dsll   $1, $1, 32
+; MIPS64: xor    $[[T0:[0-9]+]], $4, $5
+; MIPS64: sltiu  $[[T1:[0-9]+]], $[[T0]], 1
+; MIPS64: dsll   $[[T2:[0-9]+]], $[[T1]], 32
 ; MIPS64: jr     $ra
-; MIPS64: dsrl   $2, $1, 32
+; MIPS64: dsrl   $2, $[[T2]], 32
   %res = icmp eq i64 %a, %b
   %res2 = zext i1 %res to i64
   ret i64 %res2
@@ -46,16 +43,15 @@ entry:
 
 define i64 @cmpeqi(i64 %a) nounwind {
 entry:
-; OCTEON-LABEL: cmpeqi:
+; ALL-LABEL: cmpeqi:
 ; OCTEON: jr     $ra
 ; OCTEON: seqi   $2, $4, 42
-; MIPS64-LABEL: cmpeqi:
-; MIPS64: daddiu $1, $zero, 42
-; MIPS64: xor    $1, $4, $1
-; MIPS64: sltiu  $1, $1, 1
-; MIPS64: dsll   $1, $1, 32
+; MIPS64: daddiu $[[T0:[0-9]+]], $zero, 42
+; MIPS64: xor    $[[T1:[0-9]+]], $4, $[[T0]]
+; MIPS64: sltiu  $[[T2:[0-9]+]], $[[T1]], 1
+; MIPS64: dsll   $[[T3:[0-9]+]], $[[T2]], 32
 ; MIPS64: jr     $ra
-; MIPS64: dsrl   $2, $1, 32
+; MIPS64: dsrl   $2, $[[T3]], 32
   %res = icmp eq i64 %a, 42
   %res2 = zext i1 %res to i64
   ret i64 %res2
@@ -63,15 +59,14 @@ entry:
 
 define i64 @cmpne(i64 %a, i64 %b) nounwind {
 entry:
-; OCTEON-LABEL: cmpne:
+; ALL-LABEL: cmpne:
 ; OCTEON: jr     $ra
 ; OCTEON: sne    $2, $4, $5
-; MIPS64-LABEL: cmpne:
-; MIPS64: xor    $1, $4, $5
-; MIPS64: sltu   $1, $zero, $1
-; MIPS64: dsll   $1, $1, 32
+; MIPS64: xor    $[[T0:[0-9]+]], $4, $5
+; MIPS64: sltu   $[[T1:[0-9]+]], $zero, $[[T0]]
+; MIPS64: dsll   $[[T2:[0-9]+]], $[[T1]], 32
 ; MIPS64: jr     $ra
-; MIPS64: dsrl   $2, $1, 32
+; MIPS64: dsrl   $2, $[[T2]], 32
   %res = icmp ne i64 %a, %b
   %res2 = zext i1 %res to i64
   ret i64 %res2
@@ -79,16 +74,15 @@ entry:
 
 define i64 @cmpnei(i64 %a) nounwind {
 entry:
-; OCTEON-LABEL: cmpnei:
+; ALL-LABEL: cmpnei:
 ; OCTEON: jr     $ra
 ; OCTEON: snei   $2, $4, 42
-; MIPS64-LABEL: cmpnei:
-; MIPS64: daddiu $1, $zero, 42
-; MIPS64: xor    $1, $4, $1
-; MIPS64: sltu   $1, $zero, $1
-; MIPS64: dsll   $1, $1, 32
+; MIPS64: daddiu $[[T0:[0-9]+]], $zero, 42
+; MIPS64: xor    $[[T1:[0-9]+]], $4, $[[T0]]
+; MIPS64: sltu   $[[T2:[0-9]+]], $zero, $[[T1]]
+; MIPS64: dsll   $[[T3:[0-9]+]], $[[T2]], 32
 ; MIPS64: jr     $ra
-; MIPS64: dsrl   $2, $1, 32
+; MIPS64: dsrl   $2, $[[T3]], 32
   %res = icmp ne i64 %a, 42
   %res2 = zext i1 %res to i64
   ret i64 %res2
@@ -96,9 +90,8 @@ entry:
 
 define i64 @bbit0(i64 %a) nounwind {
 entry:
-; OCTEON-LABEL: bbit0:
+; ALL-LABEL: bbit0:
 ; OCTEON: bbit0   $4, 3, $[[BB0:BB[0-9_]+]]
-; MIPS64-LABEL: bbit0:
 ; MIPS64: andi  $[[T0:[0-9]+]], $4, 8
 ; MIPS64: beqz  $[[T0]], $[[BB0:BB[0-9_]+]]
   %bit = and i64 %a, 8
@@ -113,9 +106,8 @@ endif:
 
 define i64 @bbit032(i64 %a) nounwind {
 entry:
-; OCTEON-LABEL: bbit032:
+; ALL-LABEL: bbit032:
 ; OCTEON: bbit032 $4, 3, $[[BB0:BB[0-9_]+]]
-; MIPS64-LABEL: bbit032:
 ; MIPS64: daddiu  $[[T0:[0-9]+]], $zero, 1
 ; MIPS64: dsll    $[[T1:[0-9]+]], $[[T0]], 35
 ; MIPS64: and     $[[T2:[0-9]+]], $4, $[[T1]]
@@ -132,9 +124,8 @@ endif:
 
 define i64 @bbit1(i64 %a) nounwind {
 entry:
-; OCTEON-LABEL: bbit1:
+; ALL-LABEL: bbit1:
 ; OCTEON: bbit1 $4, 3, $[[BB0:BB[0-9_]+]]
-; MIPS64-LABEL: bbit1:
 ; MIPS64: andi  $[[T0:[0-9]+]], $4, 8
 ; MIPS64: beqz  $[[T0]], $[[BB0:BB[0-9_]+]]
   %bit = and i64 %a, 8
@@ -149,9 +140,8 @@ endif:
 
 define i64 @bbit132(i64 %a) nounwind {
 entry:
-; OCTEON-LABEL: bbit132:
+; ALL-LABEL: bbit132:
 ; OCTEON: bbit132 $4, 3, $[[BB0:BB[0-9_]+]]
-; MIPS64-LABEL: bbit132:
 ; MIPS64: daddiu  $[[T0:[0-9]+]], $zero, 1
 ; MIPS64: dsll    $[[T1:[0-9]+]], $[[T0]], 35
 ; MIPS64: and     $[[T2:[0-9]+]], $4, $[[T1]]