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Remove unnecessary qualification on 256-bit vector handling in LowerBUILD_VECTOR. Condition was already guaranteed by earlier code.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149680 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-02-03 06:32:21 +00:00
parent e058d27655
commit fa5b70e1d8
1 changed files with 2 additions and 2 deletions
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lib/Target/X86/X86ISelLowering.cpp
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@ -5220,9 +5220,9 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
// For AVX-length vectors, build the individual 128-bit pieces and use // For AVX-length vectors, build the individual 128-bit pieces and use
// shuffles to put them in place. // shuffles to put them in place.
if (VT.getSizeInBits() == 256 && !ISD::isBuildVectorAllZeros(Op.getNode())) { if (VT.getSizeInBits() == 256) {
SmallVector<SDValue, 32> V; SmallVector<SDValue, 32> V;
for (unsigned i = 0; i < NumElems; ++i) for (unsigned i = 0; i != NumElems; ++i)
V.push_back(Op.getOperand(i)); V.push_back(Op.getOperand(i));
EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElems/2); EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElems/2);