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[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194261 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Artyom Skrobov
2013-11-08 16:16:30 +00:00
parent 62ab26548f
commit fa840ba402
3 changed files with 59 additions and 9 deletions
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10
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -1363,6 +1363,11 @@ static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
break;
}
uint64_t featureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo()
.getFeatureBits();
if ((featureBits & ARM::HasV8Ops) && (coproc != 14))
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::CreateImm(coproc));
Inst.addOperand(MCOperand::CreateImm(CRd));
if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
@ -3814,6 +3819,11 @@ static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val,
if (Val == 0xA || Val == 0xB)
return MCDisassembler::Fail;
uint64_t featureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo()
.getFeatureBits();
if ((featureBits & ARM::HasV8Ops) && !(Val == 14 || Val == 15))
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::CreateImm(Val));
return MCDisassembler::Success;
}