diff --git a/lib/Target/PTX/PTXISelLowering.cpp b/lib/Target/PTX/PTXISelLowering.cpp
index a58cb80b287..7187518c52e 100644
--- a/lib/Target/PTX/PTXISelLowering.cpp
+++ b/lib/Target/PTX/PTXISelLowering.cpp
@@ -56,8 +56,6 @@ SDValue PTXTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
       llvm_unreachable("Unimplemented operand");
     case ISD::GlobalAddress:
       return LowerGlobalAddress(Op, DAG);
-    case ISD::BRCOND:
-      return LowerGlobalAddress(Op, DAG);
   }
 }
 
diff --git a/lib/Target/PTX/PTXInstrInfo.cpp b/lib/Target/PTX/PTXInstrInfo.cpp
index be315806776..e8675f27e41 100644
--- a/lib/Target/PTX/PTXInstrInfo.cpp
+++ b/lib/Target/PTX/PTXInstrInfo.cpp
@@ -247,11 +247,15 @@ AnalyzeBranch(MachineBasicBlock &MBB,
 }
 
 unsigned PTXInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
-  unsigned count;
-  for (count = 0; IsAnyKindOfBranch(MBB.back()); ++count)
-    MBB.pop_back();
+  unsigned count = 0;
+  while (!MBB.empty())
+    if (IsAnyKindOfBranch(MBB.back())) {
+      MBB.pop_back();
+      ++count;
+    } else
+      break;
   DEBUG(dbgs() << "RemoveBranch: MBB:   " << MBB.getName().str() << "\n");
-  DEBUG(dbgs() << "RemoveBranch: count: " << count << "\n");
+  DEBUG(dbgs() << "RemoveBranch: remove " << count << " branch inst\n");
   return count;
 }
 
@@ -262,12 +266,12 @@ InsertBranch(MachineBasicBlock &MBB,
              const SmallVectorImpl<MachineOperand> &Cond,
              DebugLoc DL) const {
   DEBUG(dbgs() << "InsertBranch: MBB: " << MBB.getName().str() << "\n");
-  DEBUG(if (TBB) dbgs() << "InsertBranch: TBB: "
-                        << TBB->getName().str() << "\n";
-      else dbgs() << "InsertBranch: TBB: (NULL)\n");
-  DEBUG(if (FBB) dbgs() << "InsertBranch: FBB: "
-                        << FBB->getName().str() << "\n";
-      else dbgs() << "InsertBranch: FBB: (NULL)\n");
+  DEBUG(if (TBB) dbgs() << "InsertBranch: TBB: " << TBB->getName().str()
+                        << "\n";
+        else     dbgs() << "InsertBranch: TBB: (NULL)\n");
+  DEBUG(if (FBB) dbgs() << "InsertBranch: FBB: " << FBB->getName().str()
+                        << "\n";
+        else     dbgs() << "InsertBranch: FBB: (NULL)\n");
   DEBUG(dbgs() << "InsertBranch: Cond size: " << Cond.size() << "\n");
 
   assert(TBB && "TBB is NULL");
diff --git a/lib/Target/PTX/PTXInstrInfo.td b/lib/Target/PTX/PTXInstrInfo.td
index 7d9ca58c3c0..f21c98d964e 100644
--- a/lib/Target/PTX/PTXInstrInfo.td
+++ b/lib/Target/PTX/PTXInstrInfo.td
@@ -618,12 +618,11 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
 }
 
 let isBranch = 1, isTerminator = 1 in {
-  // FIXME: should be able to write a pattern for brcond, but can't use
-  //        a two-value operand where a dag node expects two operands. :(
-  // NOTE: ARM & PowerPC backend also report the same problem
+  // FIXME: The pattern part is blank because I cannot (or do not yet know
+  // how to) use the first operand of PredicateOperand (a Preds register) here
   def BRAdp
     : InstPTX<(outs), (ins brtarget:$d), "bra\t$d",
-              [/*(brcond bb:$d, Preds:$p, i32imm:$c)*/]>;
+              [/*(brcond pred:$_p, bb:$d)*/]>;
 }
 
 let isReturn = 1, isTerminator = 1, isBarrier = 1 in {