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Incremental big endian patch by Jack Carter.

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These changes allow us to compile big endian from the command line for 32 bit
Mips targets. This patch will result in code and data actually being produced
in the correct endianess.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153153 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2012-03-21 00:52:01 +00:00
parent b7febfbafa
commit fb54afbcb8
3 changed files with 75 additions and 13 deletions
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37
lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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@ -92,25 +92,42 @@ public:
if (!Value)
return; // Doesn't change encoding.
// Where do we start in the object
unsigned Offset = Fixup.getOffset();
// FIXME: The below code will not work across endian models
// How many bytes/bits are we fixing up?
unsigned NumBytes = ((getFixupKindInfo(Kind).TargetSize-1)/8)+1;
uint64_t Mask = ((uint64_t)1 << getFixupKindInfo(Kind).TargetSize) - 1;
// Number of bytes we need to fixup
unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
// Used to point to big endian bytes
unsigned FullSize;
switch (Kind) {
case Mips::fixup_Mips_16:
FullSize = 2;
break;
case Mips::fixup_Mips_64:
FullSize = 8;
break;
default:
FullSize = 4;
break;
}
// Grab current value, if any, from bits.
uint64_t CurVal = 0;
for (unsigned i = 0; i != NumBytes; ++i)
CurVal |= ((uint8_t)Data[Offset + i]) << (i * 8);
for (unsigned i = 0; i != NumBytes; ++i) {
unsigned Idx = IsLittle ? i : (FullSize - 1 - i);
CurVal |= (uint64_t)((uint8_t)Data[Offset + Idx]) << (i*8);
}
uint64_t Mask = ((uint64_t)(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
CurVal = (CurVal & ~Mask) | ((CurVal + Value) & Mask);
// Write out the bytes back to the code/data bits.
// First the unaffected bits and then the fixup.
// Write out the fixed up bytes back to the code/data bits.
for (unsigned i = 0; i != NumBytes; ++i) {
Data[Offset + i] = uint8_t((CurVal >> (i * 8)) & 0xff);
unsigned Idx = IsLittle ? i : (FullSize - 1 - i);
Data[Offset + Idx] = (uint8_t)((CurVal >> (i*8)) & 0xff);
}
}
}
unsigned getNumFixupKinds() const { return Mips::NumTargetFixupKinds; }

6
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
View File

@ -49,9 +49,9 @@ public:
void EmitInstruction(uint64_t Val, unsigned Size, raw_ostream &OS) const {
// Output the instruction encoding in little endian byte order.
for (unsigned i = 0; i != Size; ++i) {
EmitByte(Val & 255, OS);
Val >>= 8;
for (unsigned i = 0; i < Size; ++i) {
unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8;
EmitByte((Val >> Shift) & 0xff, OS);
}
}

45
test/MC/Mips/elf-bigendian.ll Normal file
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@ -0,0 +1,45 @@
; RUN: llc -filetype=obj -mtriple mips-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck %s
; Check that this is big endian.
; CHECK: ('e_indent[EI_DATA]', 0x02)
; Make sure that a section table (text) entry is correct.
; CHECK: (('sh_name', 0x{{[0]*}}5) # '.text'
; CHECKNEXT: ('sh_type', 0x{{[0]*}}1)
; CHECKNEXT: ('sh_flags', 0x{{[0]*}}6)
; CHECKNEXT: ('sh_addr', 0x{{{[0-9,a-f]+}})
; CHECKNEXT: ('sh_offset', 0x{{{[0-9,a-f]+}})
; CHECKNEXT: ('sh_size', 0x{{{[0-9,a-f]+}})
; CHECKNEXT: ('sh_link', 0x{{[0]+}})
; CHECKNEXT: ('sh_info', 0x{{[0]+}})
; CHECKNEXT: ('sh_addralign', 0x{{[0]*}}4)
; CHECKNEXT: ('sh_entsize', 0x{{[0]+}})
; See that at least first 3 instructions are correct: GP prologue
; CHECKNEXT: ('_section_data', '3c1c0000 279c0000 0399e021 {{[0-9,a-f]*}}')
; ModuleID = '../br1.c'
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"
target triple = "mips-unknown-linux"
@x = global i32 1, align 4
@str = private unnamed_addr constant [4 x i8] c"goo\00"
@str2 = private unnamed_addr constant [4 x i8] c"foo\00"
define i32 @main() nounwind {
entry:
%0 = load i32* @x, align 4
%tobool = icmp eq i32 %0, 0
br i1 %tobool, label %if.end, label %foo
if.end: ; preds = %entry
%puts = tail call i32 @puts(i8* getelementptr inbounds ([4 x i8]* @str, i32 0, i32 0))
br label %foo
foo: ; preds = %entry, %if.end
%puts2 = tail call i32 @puts(i8* getelementptr inbounds ([4 x i8]* @str2, i32 0, i32 0))
ret i32 0
}
declare i32 @puts(i8* nocapture) nounwind