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R600/SI: Refactor VOP1 instruction defs

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232816 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2015-03-20 15:14:21 +00:00
parent c2c5c09f1c
commit fb9cd4bbd8
1 changed files with 12 additions and 7 deletions
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19
lib/Target/R600/SIInstrInfo.td
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@ -845,23 +845,28 @@ class VOP1_Pseudo <dag outs, dag ins, list<dag> pattern, string opName> :
field bits<9> src0;
}
class VOP1_Real_si <string opName, vop1 op, dag outs, dag ins, string asm> :
VOP1<op.SI, outs, ins, asm, []>,
SIMCInstr <opName#"_e32", SISubtarget.SI>;
class VOP1_Real_vi <string opName, vop1 op, dag outs, dag ins, string asm> :
VOP1<op.VI, outs, ins, asm, []>,
SIMCInstr <opName#"_e32", SISubtarget.VI>;
multiclass VOP1_m <vop1 op, dag outs, dag ins, string asm, list<dag> pattern,
string opName> {
def "" : VOP1_Pseudo <outs, ins, pattern, opName>;
def _si : VOP1<op.SI, outs, ins, asm, []>,
SIMCInstr <opName#"_e32", SISubtarget.SI>;
def _vi : VOP1<op.VI, outs, ins, asm, []>,
SIMCInstr <opName#"_e32", SISubtarget.VI>;
def _si : VOP1_Real_si <opName, op, outs, ins, asm>;
def _vi : VOP1_Real_vi <opName, op, outs, ins, asm>;
}
multiclass VOP1SI_m <vop1 op, dag outs, dag ins, string asm, list<dag> pattern,
string opName> {
def "" : VOP1_Pseudo <outs, ins, pattern, opName>;
def _si : VOP1<op.SI, outs, ins, asm, []>,
SIMCInstr <opName#"_e32", SISubtarget.SI>;
// No VI instruction. This class is for SI only.
def _si : VOP1_Real_si <opName, op, outs, ins, asm>;
}
class VOP2_Pseudo <dag outs, dag ins, list<dag> pattern, string opName> :