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Fix a typo in the widening of vectors in PromoteIntRes. Patch by Shemer Anat.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147272 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem 2011-12-25 20:01:38 +00:00
parent 55caf9c60a
commit fbb6f593c2
1 changed files with 2 additions and 2 deletions
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4
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@ -252,9 +252,9 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
} }
case TargetLowering::TypeWidenVector: case TargetLowering::TypeWidenVector:
if (OutVT.bitsEq(NInVT)) if (NOutVT.bitsEq(NInVT))
// The input is widened to the same size. Convert to the widened value. // The input is widened to the same size. Convert to the widened value.
return DAG.getNode(ISD::BITCAST, dl, OutVT, GetWidenedVector(InOp)); return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
} }
return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,