MIR Serialization: Serialize the machine basic block's successor weights.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243659 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alex Lorenz
2015-07-30 16:54:38 +00:00
parent cfe562c99b
commit fbd94791e6
7 changed files with 193 additions and 2 deletions

View File

@@ -56,6 +56,10 @@ struct FrameIndexOperand {
}
};
} // end anonymous namespace
namespace llvm {
/// This class prints out the machine functions using the MIR serialization
/// format.
class MIRPrinter {
@@ -88,6 +92,10 @@ private:
void initRegisterMaskIds(const MachineFunction &MF);
};
} // end namespace llvm
namespace {
/// This class prints out the machine instructions using the MIR serialization
/// format.
class MIPrinter {
@@ -363,6 +371,11 @@ void MIRPrinter::convert(ModuleSlotTracker &MST,
.printMBBReference(*SuccMBB);
YamlMBB.Successors.push_back(StrOS.str());
}
if (MBB.hasSuccessorWeights()) {
for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I)
YamlMBB.SuccessorWeights.push_back(
yaml::UnsignedValue(MBB.getSuccWeight(I)));
}
// Print the live in registers.
const auto *TRI = MBB.getParent()->getSubtarget().getRegisterInfo();
assert(TRI && "Expected target register info");