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[mips] Fix MipsLongBranch pass to work when the offset from the branch to the
target cannot be determined accurately. This is the case for NaCl where the sandboxing instructions are added in MC layer, after the MipsLongBranch pass. It is also the case when the code has inline assembly. Instead of calculating offset in the MipsLongBranch pass, use %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions that are resolved during the fixup. This patch also deletes microMIPS test file test/CodeGen/Mips/micromips-long-branch.ll and implements microMIPS CHECKs in a much simpler way in a file test/CodeGen/Mips/longbranch.ll, together with MIPS32 and MIPS64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207656 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -148,7 +148,8 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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// removing another test for this situation downstream in the
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// callchain.
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//
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if (I->isPseudo() && !Subtarget->inMips16Mode())
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if (I->isPseudo() && !Subtarget->inMips16Mode()
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&& !isLongBranchPseudo(I->getOpcode()))
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llvm_unreachable("Pseudo opcode found in EmitInstruction()");
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MCInst TmpInst0;
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@@ -954,6 +955,13 @@ void MipsAsmPrinter::NaClAlignIndirectJumpTargets(MachineFunction &MF) {
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}
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}
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bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
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return (Opcode == Mips::LONG_BRANCH_LUi
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|| Opcode == Mips::LONG_BRANCH_ADDiu
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|| Opcode == Mips::LONG_BRANCH_LUi64
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|| Opcode == Mips::LONG_BRANCH_DADDiu);
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}
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// Force static initialization.
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extern "C" void LLVMInitializeMipsAsmPrinter() {
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RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
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