diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index f0e145a394b..70c779dec20 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -2830,7 +2830,8 @@ def STRH_preidx: ARMPseudoInst<(outs GPR:$Rn_wb), def STRH_PRE : AI3ldstidx<0b1011, 0, 1, (outs GPR:$Rn_wb), (ins GPR:$Rt, addrmode3_pre:$addr), IndexModePre, StMiscFrm, IIC_iStore_bh_ru, - "strh", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> { + "strh", "\t$Rt, $addr!", + "$addr.base = $Rn_wb,@earlyclobber $Rn_wb", []> { bits<14> addr; let Inst{23} = addr{8}; // U bit let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm @@ -2843,7 +2844,8 @@ def STRH_PRE : AI3ldstidx<0b1011, 0, 1, (outs GPR:$Rn_wb), def STRH_POST : AI3ldstidx<0b1011, 0, 0, (outs GPR:$Rn_wb), (ins GPR:$Rt, addr_offset_none:$addr, am3offset:$offset), IndexModePost, StMiscFrm, IIC_iStore_bh_ru, - "strh", "\t$Rt, $addr, $offset", "$addr.base = $Rn_wb", + "strh", "\t$Rt, $addr, $offset", + "$addr.base = $Rn_wb,@earlyclobber $Rn_wb", [(set GPR:$Rn_wb, (post_truncsti16 GPR:$Rt, addr_offset_none:$addr, am3offset:$offset))]> { diff --git a/test/CodeGen/ARM/2014-07-18-earlyclobber-str-post.ll b/test/CodeGen/ARM/2014-07-18-earlyclobber-str-post.ll index 9ea762ae9bf..b65dc0c44dc 100644 --- a/test/CodeGen/ARM/2014-07-18-earlyclobber-str-post.ll +++ b/test/CodeGen/ARM/2014-07-18-earlyclobber-str-post.ll @@ -4,10 +4,20 @@ ; e.g. str r0, [r0], #4 define i32* @earlyclobber-str-post(i32* %addr) nounwind { -; CHECK: earlyclobber-str-post +; CHECK-LABEL: earlyclobber-str-post ; CHECK-NOT: str r[[REG:[0-9]+]], [r[[REG]]], #4 %val = ptrtoint i32* %addr to i32 store i32 %val, i32* %addr %new = getelementptr i32* %addr, i32 1 ret i32* %new } + +define i16* @earlyclobber-strh-post(i16* %addr) nounwind { +; CHECK-LABEL: earlyclobber-strh-post +; CHECK-NOT: strh r[[REG:[0-9]+]], [r[[REG]]], #2 + %val = ptrtoint i16* %addr to i32 + %tr = trunc i32 %val to i16 + store i16 %tr, i16* %addr + %new = getelementptr i16* %addr, i32 1 + ret i16* %new +}