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Generalize the HazardRecognizer interface so that it can be used

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to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-01-15 22:18:12 +00:00
parent c475c3608a
commit fc54c55296
13 changed files with 122 additions and 84 deletions
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11
lib/Target/CellSPU/SPUHazardRecognizers.cpp
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@@ -17,6 +17,8 @@
#include "SPUHazardRecognizers.h"
#include "SPU.h"
#include "SPUInstrInfo.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
@@ -38,14 +40,15 @@ SPUHazardRecognizer::SPUHazardRecognizer(const TargetInstrInfo &tii) :
/// instruction. Currently returns NoHazard.
///
/// \return NoHazard
HazardRecognizer::HazardType
SPUHazardRecognizer::getHazardType(SDNode *Node)
ScheduleHazardRecognizer::HazardType
SPUHazardRecognizer::getHazardType(SUnit *SU)
{
// Initial thoughts on how to do this, but this code cannot work unless the
// function's prolog and epilog code are also being scheduled so that we can
// accurately determine which pipeline is being scheduled.
#if 0
HazardRecognizer::HazardType retval = NoHazard;
const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
ScheduleHazardRecognizer::HazardType retval = NoHazard;
bool mustBeOdd = false;
switch (Node->getOpcode()) {
@@ -120,7 +123,7 @@ SPUHazardRecognizer::getHazardType(SDNode *Node)
#endif
}
void SPUHazardRecognizer::EmitInstruction(SDNode *Node)
void SPUHazardRecognizer::EmitInstruction(SUnit *SU)
{
}