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Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to SDNode-based scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -19,45 +19,6 @@
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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namespace llvm {
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namespace llvm {
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/// HazardRecognizer - This determines whether or not an instruction can be
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/// issued this cycle, and whether or not a noop needs to be inserted to handle
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/// the hazard.
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class HazardRecognizer {
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public:
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virtual ~HazardRecognizer();
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enum HazardType {
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NoHazard, // This instruction can be emitted at this cycle.
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Hazard, // This instruction can't be emitted at this cycle.
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NoopHazard // This instruction can't be emitted, and needs noops.
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};
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/// getHazardType - Return the hazard type of emitting this node. There are
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/// three possible results. Either:
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/// * NoHazard: it is legal to issue this instruction on this cycle.
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/// * Hazard: issuing this instruction would stall the machine. If some
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/// other instruction is available, issue it first.
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/// * NoopHazard: issuing this instruction would break the program. If
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/// some other instruction can be issued, do so, otherwise issue a noop.
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virtual HazardType getHazardType(SDNode *) {
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return NoHazard;
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}
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/// EmitInstruction - This callback is invoked when an instruction is
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/// emitted, to advance the hazard state.
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virtual void EmitInstruction(SDNode *) {}
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/// AdvanceCycle - This callback is invoked when no instructions can be
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/// issued on this cycle without a hazard. This should increment the
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/// internal state of the hazard recognizer so that previously "Hazard"
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/// instructions will now not be hazards.
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virtual void AdvanceCycle() {}
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/// EmitNoop - This callback is invoked when a noop was added to the
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/// instruction stream.
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virtual void EmitNoop() {}
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};
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/// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
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/// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
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///
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///
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/// Edges between SUnits are initially based on edges in the SelectionDAG,
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/// Edges between SUnits are initially based on edges in the SelectionDAG,
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63
include/llvm/CodeGen/ScheduleHazardRecognizer.h
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63
include/llvm/CodeGen/ScheduleHazardRecognizer.h
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@ -0,0 +1,63 @@
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//=- llvm/CodeGen/ScheduleHazardRecognizer.h - Scheduling Support -*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ScheduleHazardRecognizer class, which implements
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// hazard-avoidance heuristics for scheduling.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
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#define LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
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namespace llvm {
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class SUnit;
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/// HazardRecognizer - This determines whether or not an instruction can be
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/// issued this cycle, and whether or not a noop needs to be inserted to handle
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/// the hazard.
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class ScheduleHazardRecognizer {
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public:
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virtual ~ScheduleHazardRecognizer();
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enum HazardType {
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NoHazard, // This instruction can be emitted at this cycle.
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Hazard, // This instruction can't be emitted at this cycle.
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NoopHazard // This instruction can't be emitted, and needs noops.
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};
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/// getHazardType - Return the hazard type of emitting this node. There are
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/// three possible results. Either:
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/// * NoHazard: it is legal to issue this instruction on this cycle.
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/// * Hazard: issuing this instruction would stall the machine. If some
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/// other instruction is available, issue it first.
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/// * NoopHazard: issuing this instruction would break the program. If
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/// some other instruction can be issued, do so, otherwise issue a noop.
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virtual HazardType getHazardType(SUnit *) {
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return NoHazard;
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}
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/// EmitInstruction - This callback is invoked when an instruction is
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/// emitted, to advance the hazard state.
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virtual void EmitInstruction(SUnit *) {}
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/// AdvanceCycle - This callback is invoked when no instructions can be
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/// issued on this cycle without a hazard. This should increment the
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/// internal state of the hazard recognizer so that previously "Hazard"
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/// instructions will now not be hazards.
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virtual void AdvanceCycle() {}
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/// EmitNoop - This callback is invoked when a noop was added to the
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/// instruction stream.
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virtual void EmitNoop() {}
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};
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}
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#endif
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@ -33,7 +33,7 @@ namespace llvm {
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class TargetLowering;
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class TargetLowering;
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class TargetInstrInfo;
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class TargetInstrInfo;
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class FunctionLoweringInfo;
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class FunctionLoweringInfo;
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class HazardRecognizer;
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class ScheduleHazardRecognizer;
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class GCFunctionInfo;
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class GCFunctionInfo;
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class ScheduleDAG;
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class ScheduleDAG;
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@ -93,7 +93,7 @@ public:
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/// CreateTargetHazardRecognizer - Return a newly allocated hazard recognizer
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/// CreateTargetHazardRecognizer - Return a newly allocated hazard recognizer
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/// to use for this target when scheduling the DAG.
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/// to use for this target when scheduling the DAG.
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virtual HazardRecognizer *CreateTargetHazardRecognizer();
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virtual ScheduleHazardRecognizer *CreateTargetHazardRecognizer();
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protected:
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protected:
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/// DAGSize - Size of DAG being instruction selected.
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/// DAGSize - Size of DAG being instruction selected.
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@ -1293,7 +1293,23 @@ public:
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return getOperand(getNumOperands()-1).getNode();
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return getOperand(getNumOperands()-1).getNode();
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return 0;
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return 0;
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}
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}
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// If this is a pseudo op, like copyfromreg, look to see if there is a
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// real target node flagged to it. If so, return the target node.
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const SDNode *getFlaggedMachineNode() const {
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const SDNode *FoundNode = this;
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// Climb up flag edges until a machine-opcode node is found, or the
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// end of the chain is reached.
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while (!FoundNode->isMachineOpcode()) {
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const SDNode *N = FoundNode->getFlaggedNode();
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if (!N) break;
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FoundNode = N;
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}
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return FoundNode;
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}
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/// getNumValues - Return the number of values defined/returned by this
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/// getNumValues - Return the number of values defined/returned by this
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/// operator.
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/// operator.
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///
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///
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@ -14,6 +14,7 @@
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#define DEBUG_TYPE "pre-RA-sched"
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#define DEBUG_TYPE "pre-RA-sched"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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@ -561,3 +562,5 @@ void ScheduleDAGTopologicalSort::Allocate(int n, int index) {
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ScheduleDAGTopologicalSort::ScheduleDAGTopologicalSort(
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ScheduleDAGTopologicalSort::ScheduleDAGTopologicalSort(
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std::vector<SUnit> &sunits)
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std::vector<SUnit> &sunits)
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: SUnits(sunits) {}
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: SUnits(sunits) {}
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ScheduleHazardRecognizer::~ScheduleHazardRecognizer() {}
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#define DEBUG_TYPE "pre-RA-sched"
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#define DEBUG_TYPE "pre-RA-sched"
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#include "llvm/CodeGen/LatencyPriorityQueue.h"
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#include "llvm/CodeGen/LatencyPriorityQueue.h"
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#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
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#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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#include "llvm/CodeGen/SchedulerRegistry.h"
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#include "llvm/CodeGen/SchedulerRegistry.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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std::vector<SUnit*> PendingQueue;
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std::vector<SUnit*> PendingQueue;
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/// HazardRec - The hazard recognizer to use.
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/// HazardRec - The hazard recognizer to use.
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HazardRecognizer *HazardRec;
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ScheduleHazardRecognizer *HazardRec;
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public:
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public:
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ScheduleDAGList(MachineFunction &mf,
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ScheduleDAGList(MachineFunction &mf,
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SchedulingPriorityQueue *availqueue,
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SchedulingPriorityQueue *availqueue,
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HazardRecognizer *HR)
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ScheduleHazardRecognizer *HR)
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: ScheduleDAGSDNodes(mf),
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: ScheduleDAGSDNodes(mf),
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AvailableQueue(availqueue), HazardRec(HR) {
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AvailableQueue(availqueue), HazardRec(HR) {
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}
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}
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};
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};
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} // end anonymous namespace
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} // end anonymous namespace
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HazardRecognizer::~HazardRecognizer() {}
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/// Schedule - Schedule the DAG using list scheduling.
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/// Schedule - Schedule the DAG using list scheduling.
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void ScheduleDAGList::Schedule() {
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void ScheduleDAGList::Schedule() {
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DOUT << "********** List Scheduling **********\n";
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DOUT << "********** List Scheduling **********\n";
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}
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}
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SUnit *FoundSUnit = 0;
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SUnit *FoundSUnit = 0;
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SDNode *FoundNode = 0;
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bool HasNoopHazards = false;
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bool HasNoopHazards = false;
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while (!AvailableQueue->empty()) {
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while (!AvailableQueue->empty()) {
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SUnit *CurSUnit = AvailableQueue->pop();
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SUnit *CurSUnit = AvailableQueue->pop();
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// Get the node represented by this SUnit.
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ScheduleHazardRecognizer::HazardType HT =
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FoundNode = CurSUnit->getNode();
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HazardRec->getHazardType(CurSUnit);
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if (HT == ScheduleHazardRecognizer::NoHazard) {
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// If this is a pseudo op, like copyfromreg, look to see if there is a
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// real target node flagged to it. If so, use the target node.
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while (!FoundNode->isMachineOpcode()) {
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SDNode *N = FoundNode->getFlaggedNode();
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if (!N) break;
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FoundNode = N;
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}
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HazardRecognizer::HazardType HT = HazardRec->getHazardType(FoundNode);
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if (HT == HazardRecognizer::NoHazard) {
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FoundSUnit = CurSUnit;
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FoundSUnit = CurSUnit;
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break;
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break;
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}
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}
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// Remember if this is a noop hazard.
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// Remember if this is a noop hazard.
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HasNoopHazards |= HT == HazardRecognizer::NoopHazard;
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HasNoopHazards |= HT == ScheduleHazardRecognizer::NoopHazard;
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NotReady.push_back(CurSUnit);
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NotReady.push_back(CurSUnit);
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}
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}
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// If we found a node to schedule, do it now.
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// If we found a node to schedule, do it now.
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if (FoundSUnit) {
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if (FoundSUnit) {
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ScheduleNodeTopDown(FoundSUnit, CurCycle);
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ScheduleNodeTopDown(FoundSUnit, CurCycle);
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HazardRec->EmitInstruction(FoundNode);
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HazardRec->EmitInstruction(FoundSUnit);
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// If this is a pseudo-op node, we don't want to increment the current
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// If this is a pseudo-op node, we don't want to increment the current
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// cycle.
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// cycle.
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
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#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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#include "llvm/CodeGen/SchedulerRegistry.h"
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#include "llvm/CodeGen/SchedulerRegistry.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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@ -1079,8 +1080,8 @@ ScheduleDAG *SelectionDAGISel::Schedule() {
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}
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}
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HazardRecognizer *SelectionDAGISel::CreateTargetHazardRecognizer() {
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ScheduleHazardRecognizer *SelectionDAGISel::CreateTargetHazardRecognizer() {
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return new HazardRecognizer();
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return new ScheduleHazardRecognizer();
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#include "SPUHazardRecognizers.h"
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#include "SPUHazardRecognizers.h"
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#include "SPU.h"
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#include "SPU.h"
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#include "SPUInstrInfo.h"
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#include "SPUInstrInfo.h"
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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using namespace llvm;
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/// instruction. Currently returns NoHazard.
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/// instruction. Currently returns NoHazard.
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///
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///
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/// \return NoHazard
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/// \return NoHazard
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HazardRecognizer::HazardType
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ScheduleHazardRecognizer::HazardType
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SPUHazardRecognizer::getHazardType(SDNode *Node)
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SPUHazardRecognizer::getHazardType(SUnit *SU)
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{
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{
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// Initial thoughts on how to do this, but this code cannot work unless the
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// Initial thoughts on how to do this, but this code cannot work unless the
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// function's prolog and epilog code are also being scheduled so that we can
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// function's prolog and epilog code are also being scheduled so that we can
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// accurately determine which pipeline is being scheduled.
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// accurately determine which pipeline is being scheduled.
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#if 0
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#if 0
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HazardRecognizer::HazardType retval = NoHazard;
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const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
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ScheduleHazardRecognizer::HazardType retval = NoHazard;
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bool mustBeOdd = false;
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bool mustBeOdd = false;
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switch (Node->getOpcode()) {
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switch (Node->getOpcode()) {
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@ -120,7 +123,7 @@ SPUHazardRecognizer::getHazardType(SDNode *Node)
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#endif
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#endif
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}
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}
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void SPUHazardRecognizer::EmitInstruction(SDNode *Node)
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void SPUHazardRecognizer::EmitInstruction(SUnit *SU)
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{
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{
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}
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}
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#ifndef SPUHAZRECS_H
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#ifndef SPUHAZRECS_H
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#define SPUHAZRECS_H
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#define SPUHAZRECS_H
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#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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#include "SPUInstrInfo.h"
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namespace llvm {
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namespace llvm {
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class TargetInstrInfo;
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/// SPUHazardRecognizer
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/// SPUHazardRecognizer
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class SPUHazardRecognizer : public HazardRecognizer
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class SPUHazardRecognizer : public ScheduleHazardRecognizer
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{
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{
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private:
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private:
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const TargetInstrInfo &TII;
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const TargetInstrInfo &TII;
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@ -29,8 +30,8 @@ private:
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public:
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public:
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SPUHazardRecognizer(const TargetInstrInfo &TII);
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SPUHazardRecognizer(const TargetInstrInfo &TII);
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virtual HazardType getHazardType(SDNode *Node);
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virtual HazardType getHazardType(SUnit *SU);
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virtual void EmitInstruction(SDNode *Node);
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virtual void EmitInstruction(SUnit *SU);
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virtual void AdvanceCycle();
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virtual void AdvanceCycle();
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virtual void EmitNoop();
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virtual void EmitNoop();
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};
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};
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} // end namespace llvm
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} // end namespace llvm
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#endif
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#endif
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||||||
|
|
||||||
|
@ -353,7 +353,7 @@ public:
|
|||||||
|
|
||||||
/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for
|
/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for
|
||||||
/// this target when scheduling the DAG.
|
/// this target when scheduling the DAG.
|
||||||
virtual HazardRecognizer *CreateTargetHazardRecognizer() {
|
virtual ScheduleHazardRecognizer *CreateTargetHazardRecognizer() {
|
||||||
const TargetInstrInfo *II = TM.getInstrInfo();
|
const TargetInstrInfo *II = TM.getInstrInfo();
|
||||||
assert(II && "No InstrInfo?");
|
assert(II && "No InstrInfo?");
|
||||||
return new SPUHazardRecognizer(*II);
|
return new SPUHazardRecognizer(*II);
|
||||||
|
@ -15,6 +15,7 @@
|
|||||||
#include "PPCHazardRecognizers.h"
|
#include "PPCHazardRecognizers.h"
|
||||||
#include "PPC.h"
|
#include "PPC.h"
|
||||||
#include "PPCInstrInfo.h"
|
#include "PPCInstrInfo.h"
|
||||||
|
#include "llvm/CodeGen/ScheduleDAG.h"
|
||||||
#include "llvm/Support/Debug.h"
|
#include "llvm/Support/Debug.h"
|
||||||
using namespace llvm;
|
using namespace llvm;
|
||||||
|
|
||||||
@ -118,8 +119,9 @@ isLoadOfStoredAddress(unsigned LoadSize, SDValue Ptr1, SDValue Ptr2) const {
|
|||||||
/// terminate terminate the dispatch group. We turn NoopHazard for any
|
/// terminate terminate the dispatch group. We turn NoopHazard for any
|
||||||
/// instructions that wouldn't terminate the dispatch group that would cause a
|
/// instructions that wouldn't terminate the dispatch group that would cause a
|
||||||
/// pipeline flush.
|
/// pipeline flush.
|
||||||
HazardRecognizer::HazardType PPCHazardRecognizer970::
|
ScheduleHazardRecognizer::HazardType PPCHazardRecognizer970::
|
||||||
getHazardType(SDNode *Node) {
|
getHazardType(SUnit *SU) {
|
||||||
|
const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
|
||||||
bool isFirst, isSingle, isCracked, isLoad, isStore;
|
bool isFirst, isSingle, isCracked, isLoad, isStore;
|
||||||
PPCII::PPC970_Unit InstrType =
|
PPCII::PPC970_Unit InstrType =
|
||||||
GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
|
GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
|
||||||
@ -217,7 +219,8 @@ getHazardType(SDNode *Node) {
|
|||||||
return NoHazard;
|
return NoHazard;
|
||||||
}
|
}
|
||||||
|
|
||||||
void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) {
|
void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) {
|
||||||
|
const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
|
||||||
bool isFirst, isSingle, isCracked, isLoad, isStore;
|
bool isFirst, isSingle, isCracked, isLoad, isStore;
|
||||||
PPCII::PPC970_Unit InstrType =
|
PPCII::PPC970_Unit InstrType =
|
||||||
GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
|
GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
|
||||||
|
@ -14,7 +14,8 @@
|
|||||||
#ifndef PPCHAZRECS_H
|
#ifndef PPCHAZRECS_H
|
||||||
#define PPCHAZRECS_H
|
#define PPCHAZRECS_H
|
||||||
|
|
||||||
#include "llvm/CodeGen/ScheduleDAGSDNodes.h"
|
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
|
||||||
|
#include "llvm/CodeGen/SelectionDAGNodes.h"
|
||||||
#include "PPCInstrInfo.h"
|
#include "PPCInstrInfo.h"
|
||||||
|
|
||||||
namespace llvm {
|
namespace llvm {
|
||||||
@ -25,7 +26,7 @@ namespace llvm {
|
|||||||
/// avoid structural hazards that cause significant performance penalties (e.g.
|
/// avoid structural hazards that cause significant performance penalties (e.g.
|
||||||
/// setting the CTR register then branching through it within a dispatch group),
|
/// setting the CTR register then branching through it within a dispatch group),
|
||||||
/// or storing then loading from the same address within a dispatch group.
|
/// or storing then loading from the same address within a dispatch group.
|
||||||
class PPCHazardRecognizer970 : public HazardRecognizer {
|
class PPCHazardRecognizer970 : public ScheduleHazardRecognizer {
|
||||||
const TargetInstrInfo &TII;
|
const TargetInstrInfo &TII;
|
||||||
|
|
||||||
unsigned NumIssued; // Number of insts issued, including advanced cycles.
|
unsigned NumIssued; // Number of insts issued, including advanced cycles.
|
||||||
@ -47,8 +48,8 @@ class PPCHazardRecognizer970 : public HazardRecognizer {
|
|||||||
|
|
||||||
public:
|
public:
|
||||||
PPCHazardRecognizer970(const TargetInstrInfo &TII);
|
PPCHazardRecognizer970(const TargetInstrInfo &TII);
|
||||||
virtual HazardType getHazardType(SDNode *Node);
|
virtual HazardType getHazardType(SUnit *SU);
|
||||||
virtual void EmitInstruction(SDNode *Node);
|
virtual void EmitInstruction(SUnit *SU);
|
||||||
virtual void AdvanceCycle();
|
virtual void AdvanceCycle();
|
||||||
virtual void EmitNoop();
|
virtual void EmitNoop();
|
||||||
|
|
||||||
|
@ -181,7 +181,7 @@ namespace {
|
|||||||
|
|
||||||
/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for
|
/// CreateTargetHazardRecognizer - Return the hazard recognizer to use for
|
||||||
/// this target when scheduling the DAG.
|
/// this target when scheduling the DAG.
|
||||||
virtual HazardRecognizer *CreateTargetHazardRecognizer() {
|
virtual ScheduleHazardRecognizer *CreateTargetHazardRecognizer() {
|
||||||
// Should use subtarget info to pick the right hazard recognizer. For
|
// Should use subtarget info to pick the right hazard recognizer. For
|
||||||
// now, always return a PPC970 recognizer.
|
// now, always return a PPC970 recognizer.
|
||||||
const TargetInstrInfo *II = TM.getInstrInfo();
|
const TargetInstrInfo *II = TM.getInstrInfo();
|
||||||
|
Loading…
Reference in New Issue
Block a user