[FastISel] Fix a potential bug in FastEmitInst_ri

FastEmitInst_ri was constraining the first operand without checking if it is
a virtual register. Use constrainOperandRegClass as all the other
FastEmitInst_* functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216613 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka 2014-08-27 20:47:33 +00:00
parent 5b92f447ab
commit fc68dad43c

View File

@ -1816,8 +1816,7 @@ unsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode,
const MCInstrDesc &II = TII.get(MachineInstOpcode);
unsigned ResultReg = createResultReg(RC);
RC = TII.getRegClass(II, II.getNumDefs(), &TRI, *FuncInfo.MF);
MRI.constrainRegClass(Op0, RC);
Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs());
if (II.getNumDefs() >= 1)
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg)